On Sunday 06 November 2011 14:29:47 Simon Glass wrote:
On this particular patch, I feel it should be more explicit about L1 cache, which is what I think it deals with. We may want to support L2 also through a similar API. And a CONFIG option is a good idea.
the point of flushing caches is to make the memory coherent to other devices (like peripherals). we don't differentiate between the cache levels.
Finally, even the CP15/cache/MMU code is duplicated in different arch/arm/cpu subdirs. Can we unify this a bit?
things should be separated based on core and system levels. the fact that a particular SoC is say armv4 doesn't mean it should have armv4 specific cache/mmu handling in its SoC subdir. i think the Linux arm tree is properly separating things. -mike