
Hi Rajeshwari,
On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde < rajeshwari.s@samsung.com> wrote:
Adding the base patch for Exynos based SMDK5420. This shall enable compilation and basic boot support for SMDK5420.
Signed-off-by: Rajeshwari S Shinde rajeshwari.s@samsung.com Signed-off-by: Akshay Saraswat akshay.s@samsung.com
Changes in V2: - None Changes in V3: - None MAINTAINERS | 1 + Makefile | 2 +- board/samsung/common/board.c | 2 + board/samsung/smdk5420/Makefile | 50 ++++++ board/samsung/smdk5420/smdk5420.c | 281 ++++++++++++++++++++++++++++++++++ board/samsung/smdk5420/smdk5420_spl.c | 68 ++++++++ boards.cfg | 1 + tools/Makefile | 2 + 8 files changed, 406 insertions(+), 1 deletion(-) create mode 100644 board/samsung/smdk5420/Makefile create mode 100644 board/samsung/smdk5420/smdk5420.c create mode 100644 board/samsung/smdk5420/smdk5420_spl.c
diff --git a/MAINTAINERS b/MAINTAINERS index 9700ec9..97990fb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -939,6 +939,7 @@ Bo Shen voice.shen@atmel.com Rajeshwari Shinde rajeshwari.s@samsung.com
snow ARM ARMV7 (EXYNOS5250 SoC)
smdk5420 ARM ARMV7 (EXYNOS5420 SoC)
This file is gone now - I think you need to rebase to mainline.
Michal Simek monstr@monstr.eu
diff --git a/Makefile b/Makefile index 488db8a..cf1bc1c 100644 --- a/Makefile +++ b/Makefile @@ -813,7 +813,7 @@ clean: $(obj)tools/gdb/{astest,gdbcont,gdbsend} \ $(obj)tools/gen_eth_addr $(obj)tools/img2srec \ $(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
$(obj)tools/mk{$(BOARD),}spl \
$(obj)tools/mk{$(BOARD)}spl \
What is happening here?
$(obj)tools/mxsboot \ $(obj)tools/ncb $(obj)tools/ubsha1 \ $(obj)tools/kernel-doc/docproc \
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index bfcfbdf..f255d69 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -154,6 +154,7 @@ struct cros_ec_dev *board_get_cros_ec_dev(void) return local.cros_ec_dev; }
+#ifdef CONFIG_CROS_EC static int board_init_cros_ec_devices(const void *blob) { local.cros_ec_err = cros_ec_init(blob, &local.cros_ec_dev); @@ -162,6 +163,7 @@ static int board_init_cros_ec_devices(const void *blob)
return 0;
} +#endif
#if defined(CONFIG_POWER) static int pmic_reg_update(struct pmic *p, int reg, uint regval) diff --git a/board/samsung/smdk5420/Makefile b/board/samsung/smdk5420/Makefile new file mode 100644 index 0000000..15e992e --- /dev/null +++ b/board/samsung/smdk5420/Makefile @@ -0,0 +1,50 @@ +# +# Copyright (C) 2013 Samsung Electronics +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(BOARD).o
+COBJS += smdk5420_spl.o
+ifndef CONFIG_SPL_BUILD +COBJS += smdk5420.o +endif
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+ALL := $(obj).depend $(LIB)
+all: $(ALL)
+$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c new file mode 100644 index 0000000..b4c860e --- /dev/null +++ b/board/samsung/smdk5420/smdk5420.c @@ -0,0 +1,281 @@ +/*
- Copyright (C) 2013 Samsung Electronics
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <fdtdec.h> +#include <asm/io.h> +#include <i2c.h> +#include <lcd.h> +#include <netdev.h> +#include <spi.h> +#include <asm/arch/board.h> +#include <asm/arch/cpu.h> +#include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/sromc.h> +#include <asm/arch/dp_info.h> +#include <power/pmic.h>
+DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_USB_EHCI_EXYNOS +int board_usb_vbus_init(void) +{
struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
samsung_get_base_gpio_part1();
/* Enable VBUS power switch */
s5p_gpio_direction_output(&gpio1->x2, 6, 1);
/* VBUS turn ON time */
mdelay(3);
return 0;
+} +#endif
+int exynos_init(void) +{ +#ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
+#endif
return 0;
+}
+static int decode_sromc(const void *blob, struct fdt_sromc *config) +{
int err;
int node;
node = fdtdec_next_compatible(blob, 0,
COMPAT_SAMSUNG_EXYNOS5_SROMC);
if (node < 0) {
debug("Could not find SROMC node\n");
return node;
}
config->bank = fdtdec_get_int(blob, node, "bank", 0);
config->width = fdtdec_get_int(blob, node, "width", 2);
err = fdtdec_get_int_array(blob, node, "srom-timing",
config->timing,
FDT_SROM_TIMING_COUNT);
if (err < 0) {
debug("Could not decode SROMC configuration Error: %s\n",
fdt_strerror(err));
return -FDT_ERR_NOTFOUND;
}
return 0;
+}
+int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SMC911X
u32 smc_bw_conf, smc_bc_conf;
struct fdt_sromc config;
fdt_addr_t base_addr;
int node;
node = decode_sromc(gd->fdt_blob, &config);
if (node < 0) {
debug("%s: Could not find sromc configuration\n",
__func__);
return 0;
}
node = fdtdec_next_compatible(gd->fdt_blob, node,
COMPAT_SMSC_LAN9215);
if (node < 0) {
debug("%s: Could not find lan9215 configuration\n",
__func__);
return 0;
}
/* We now have a node, so any problems from now on are errors */
base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
if (base_addr == FDT_ADDR_T_NONE) {
debug("%s: Could not find lan9215 address\n", __func__);
return -1;
}
/* Ethernet needs data bus width of 16 bits */
if (config.width != 2) {
debug("%s: Unsupported bus width %d\n", __func__,
config.width);
return -1;
}
smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
| SROMC_BYTE_ENABLE(config.bank);
smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
/* Select and configure the SROMC bank */
exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
return smc911x_initialize(0, base_addr);
+#endif
return 0;
+}
+#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{
int ret;
/* dwmmc initializattion for available channels */
ret = exynos_dwmmc_init(gd->fdt_blob);
if (ret)
debug("dwmmc init failed\n");
return ret;
+} +#endif
+#if defined(CONFIG_POWER) +int power_init_board(void) +{
if (pmic_init(I2C_PMIC)) {
debug("Could not initialise PMIC\n");
return -1;
} else {
return 0;
}
+} +#endif
+#ifdef CONFIG_LCD +void cfg_lcd_gpio(void) +{
struct exynos5_gpio_part1 *gpio1 =
(struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1();
/* For Backlight */
s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
s5p_gpio_set_value(&gpio1->b2, 0, 1);
/* LCD power on */
s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
s5p_gpio_set_value(&gpio1->x1, 5, 1);
/* Set Hotplug detect for DP */
s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
+}
+vidinfo_t panel_info = {
.vl_freq = 60,
.vl_col = 2560,
.vl_row = 1600,
.vl_width = 2560,
.vl_height = 1600,
.vl_clkp = CONFIG_SYS_LOW,
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
.vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on
LCD */
/* wDP panel timing infomation */
.vl_hspw = 32,
.vl_hbpd = 80,
.vl_hfpd = 48,
.vl_vspw = 6,
.vl_vbpd = 37,
.vl_vfpd = 3,
.vl_cmd_allow_len = 0xf,
.win_id = 3,
.cfg_gpio = cfg_lcd_gpio,
.backlight_on = NULL,
.lcd_power_on = NULL,
.reset_lcd = NULL,
.dual_lcd_enabled = 0,
.init_delay = 0,
.power_on_delay = 0,
.reset_delay = 0,
.interface_mode = FIMD_RGB_INTERFACE,
.dp_enabled = 1,
+};
+static struct edp_device_info edp_info = {
.disp_info = {
.h_res = 2560,
.h_sync_width = 32,
.h_back_porch = 80,
.h_front_porch = 48,
.v_res = 1600,
.v_sync_width = 6,
.v_back_porch = 37,
.v_front_porch = 3,
.v_sync_rate = 60,
},
.lt_info = {
.lt_status = DP_LT_NONE,
},
.video_info = {
.master_mode = 0,
.bist_mode = DP_DISABLE,
.bist_pattern = NO_PATTERN,
.h_sync_polarity = 0,
.v_sync_polarity = 0,
.interlaced = 0,
.color_space = COLOR_RGB,
.dynamic_range = VESA,
.ycbcr_coeff = COLOR_YCBCR601,
.color_depth = COLOR_8,
},
+};
+static struct exynos_dp_platform_data dp_platform_data = {
.phy_enable = set_dp_phy_ctrl,
.edp_dev_info = &edp_info,
+};
+void init_panel_info(vidinfo_t *vid) +{
vid->rgb_mode = MODE_RGB_P,
exynos_set_dp_platform_data(&dp_platform_data);
+} +#endif
+int board_get_revision(void) +{
return 0;
+}
+#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{
const char *board_name;
board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
if (board_name == NULL)
printf("\nUnknown Board\n");
else
printf("\nBoard: %s\n", board_name);
return 0;
+} +#endif diff --git a/board/samsung/smdk5420/smdk5420_spl.c b/board/samsung/smdk5420/smdk5420_spl.c new file mode 100644 index 0000000..ce8c475 --- /dev/null +++ b/board/samsung/smdk5420/smdk5420_spl.c @@ -0,0 +1,68 @@ +/*
- Copyright (c) 2013 The Chromium OS Authors.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/arch/cpu.h> +#include <asm/arch/spl.h> +#include <asm/arch/clk.h>
+#define SIGNATURE 0xdeadbeef
+/* Parameters of early board initialization in SPL */ +static struct spl_machine_param machine_param
__attribute__((section(".machine_param"))) = {
.signature = SIGNATURE,
.version = 1,
.params = "vmubfasirM",
.size = sizeof(machine_param),
.mem_iv_size = 0x1f,
.mem_type = DDR_MODE_DDR3,
/*
* Set uboot_size to 0x100000 bytes.
*
* This is an overly conservative value chosen to accommodate all
* possible U-Boot image. You are advised to set this value to a
* smaller realistic size via scripts that modifies the
.machine_param
* section of output U-Boot image.
*/
.uboot_size = 0x100000,
.boot_source = BOOT_MODE_OM,
.frequency_mhz = 800,
.arm_freq_mhz = 900,
.serial_base = 0x12c30000,
.i2c_base = 0x12c60000,
.mem_manuf = MEM_MANUF_SAMSUNG,
+};
+struct spl_machine_param *spl_get_machine_params(void) +{
if (machine_param.signature != SIGNATURE) {
/* Will hang if SIGNATURE dont match */
while (1)
;
}
return &machine_param;
+} diff --git a/boards.cfg b/boards.cfg index 598561b..c514bf7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -329,6 +329,7 @@ s5pc210_universal arm armv7 universal_c210 samsung snow arm armv7 smdk5250 samsung exynos smdk5250 arm armv7 smdk5250 samsung exynos smdkv310 arm armv7 smdkv310 samsung exynos +smdk5420 arm armv7 smdk5420 samsung exynos
Again this needs a rebase.
trats arm armv7 trats samsung exynos harmony arm armv7:arm720t harmony nvidia tegra20 seaboard arm armv7:arm720t seaboard nvidia tegra20 diff --git a/tools/Makefile b/tools/Makefile index b941192..5ddfa80 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -53,6 +53,7 @@ BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX) BIN_FILES-y += mkenvimage$(SFX) BIN_FILES-y += mkimage$(SFX) BIN_FILES-$(CONFIG_EXYNOS5250) += mk$(BOARD)spl$(SFX) +BIN_FILES-$(CONFIG_EXYNOS5420) += mk$(BOARD)spl$(SFX)
This has changed also I think. I could not get this to build properly.
BIN_FILES-$(CONFIG_MX23) += mxsboot$(SFX) BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX) BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX) @@ -88,6 +89,7 @@ NOPED_OBJ_FILES-y += omapimage.o NOPED_OBJ_FILES-y += mkenvimage.o NOPED_OBJ_FILES-y += mkimage.o OBJ_FILES-$(CONFIG_EXYNOS5250) += mkexynosspl.o +OBJ_FILES-$(CONFIG_EXYNOS5420) += mkexynosspl.o OBJ_FILES-$(CONFIG_MX23) += mxsboot.o OBJ_FILES-$(CONFIG_MX28) += mxsboot.o OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o -- 1.7.12.4
Regards, Simon