On 12/02/2016 10:24 PM, stefan.herbrechtsmeier@weidmueller.de wrote:
From: Stefan Herbrechtsmeier stefan.herbrechtsmeier@weidmueller.de
The maximum supported peripheral clock frequency of the zynq depends on the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz respectively 25 MHz. Use the max-frequency value of the device tree to determine the maximal supported peripheral clock frequency.
Signed-off-by: Stefan Herbrechtsmeier stefan.herbrechtsmeier@weidmueller.de Acked-by: Michal Simek michal.simek@xilinx.com
Even if this patch is delegated to Michal, i picked to this. Applied on u-boot-mmc.
Best Regards, Jaehoon Chung
Changes in v3: None Changes in v2: None
drivers/mmc/zynq_sdhci.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 26bd1be..4d2f0b5 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -16,6 +16,8 @@
#include <asm/arch/clk.h>
+DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ # define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0 #endif @@ -23,6 +25,7 @@ struct arasan_sdhci_plat { struct mmc_config cfg; struct mmc mmc;
- unsigned int f_max;
};
static int arasan_sdhci_probe(struct udevice *dev) @@ -67,7 +70,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->max_clk = clock;
- ret = sdhci_setup_cfg(&plat->cfg, host, CONFIG_ZYNQ_SDHCI_MAX_FREQ,
- ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max, CONFIG_ZYNQ_SDHCI_MIN_FREQ); host->mmc = &plat->mmc; if (ret)
@@ -81,11 +84,15 @@ static int arasan_sdhci_probe(struct udevice *dev)
static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) {
struct arasan_sdhci_plat *plat = dev_get_platdata(dev); struct sdhci_host *host = dev_get_priv(dev);
host->name = dev->name; host->ioaddr = (void *)dev_get_addr(dev);
plat->f_max = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"max-frequency", CONFIG_ZYNQ_SDHCI_MAX_FREQ);return 0;
}