From: Tien Fong Chee tien.fong.chee@intel.com
This is the 4th version of patchset to adds support for Intel Arria 10 SoC FPGA driver. This version mainly resolved comments from Ley Foon and Dinh in [v3]. This series is working on top of u-boot-socfpga-next branch http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/next.
[v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg249160.html
v3 -> v4 changes: ----------------- - Fixed typo on patch 1 and patch 2. - Created separate patch for enabling FPGA driver build on SPL. - No change on patch 3. - Removed some unnecessary wrappers and unused function.
Patchset history ---------------- [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg247788.html [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg248541.html
Tien Fong Chee (5): arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset arm: socfpga: Restructure FPGA driver in the preparation to support A10. arm: socfpga: Enable FPGA driver on SPL arm: socfpga: Move FPGA manager driver to FPGA driver arm: socfpga: Add FPGA driver support for Arria 10
arch/arm/mach-socfpga/Makefile | 1 - arch/arm/mach-socfpga/fpga_manager.c | 78 ---- arch/arm/mach-socfpga/include/mach/fpga_manager.h | 70 +-- .../include/mach/fpga_manager_arria10.h | 100 +++++ .../mach/{fpga_manager.h => fpga_manager_gen5.h} | 69 ++- .../include/mach/reset_manager_arria10.h | 2 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 4 +- drivers/Makefile | 1 + drivers/fpga/Makefile | 2 + drivers/fpga/socfpga.c | 241 +---------- drivers/fpga/socfpga_arria10.c | 479 +++++++++++++++++++++ drivers/fpga/{socfpga.c => socfpga_gen5.c} | 98 ++--- include/configs/socfpga_common.h | 3 +- 13 files changed, 684 insertions(+), 464 deletions(-) delete mode 100644 arch/arm/mach-socfpga/fpga_manager.c create mode 100644 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h => fpga_manager_gen5.h} (57%) create mode 100644 drivers/fpga/socfpga_arria10.c copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (85%)