
18 Sep
2014
18 Sep
'14
5:19 p.m.
Hi!
What board are doing your testing on? The Arrow Sockit?
I have board similar to SocKit, yes.
I also see this error print:
U-Boot 2014.10-rc2-00139-g70e9e3e-dirty (Sep 16 2014 - 16:26:56)
CPU: Altera SoCFPGA Platform BOARD: Altera SoCFPGA Cyclone5 Board Watchdog enabled DRAM: 1 GiB WARNING: Caches not enabled Using default environment
In: serial Out: serial Err: serial Net: dwmac.ff702000 Error: dwmac.ff702000 address not set. ^^^^^
Do you see this on your side? I can track it down...
i2c code that reads address from ROM was not part of the merge, so you need to either set address manually or port it from rocketboards version.
Best regards, Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html