Stephen,
On Wed, Jan 16, 2013 at 3:46 PM, Stephen Warren swarren@wwwdotorg.org wrote:
On 01/16/2013 02:14 PM, Tom Warren wrote:
These files are used by both SPL and main U-Boot.
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c
@@ -68,7 +70,7 @@ unsigned int query_sdram_size(void) case 3: return 0x40000000; /* 1GB */ } -#else /* Tegra30 */ +#elif defined(CONFIG_TEGRA30) /* bits 31:28 in OdmData are used for RAM size on T30 */ switch ((reg) >> 28) { case 0: @@ -84,6 +86,8 @@ unsigned int query_sdram_size(void) case 8: return 0x7ff00000; /* 2GB - 1MB */ } +#else
return 0x7ff00000; /* 2GB - 1MB */Indentation looks wrong.
I doubt all Tegra114 systems have 2GB RAM; is there no ODMDATA field allocated for the RAM size? I know there was some discussion of removing it from ODMDATA and simply reading a memory controller register, since the information was duplicated there.
See my previous reply. I hadn't thought T114 BITs/BCTs would change, but they did, and I finally found the ODMDATA location and have a fix for this (in V2). RAM size is the same as T30, AFAICT. The ODMDATA field I've been flashing with is 0x80098000, which s/b 2GB.
I'll poke around bugs and wikis before I send V2 to make sure my Dalmore is really 2GB and that the ODMDATA RAM field hasn't changed (although I remember an email thread w/HW about not changing it).
diff --git a/arch/arm/cpu/tegra114-common/clock.c b/arch/arm/cpu/tegra114-common/clock.c diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/cpu/tegra114-common/pinmux.c
I didn't review those two files.
OK.
Tom