New board/intel/galileo board directory with minimum codes, plus board dts, defconfig and configuration files.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Simon Glass sjg@chromium.org ---
Changes in v3: None Changes in v2: None
arch/x86/dts/Makefile | 1 + arch/x86/dts/galileo.dts | 43 +++++++++++++++++++++++++++++++++ board/intel/galileo/Kconfig | 21 ++++++++++++++++ board/intel/galileo/MAINTAINERS | 6 +++++ board/intel/galileo/Makefile | 7 ++++++ board/intel/galileo/galileo.c | 19 +++++++++++++++ board/intel/galileo/start.S | 9 +++++++ configs/galileo_defconfig | 6 +++++ include/configs/galileo.h | 53 +++++++++++++++++++++++++++++++++++++++++ 9 files changed, 165 insertions(+) create mode 100644 arch/x86/dts/galileo.dts create mode 100644 board/intel/galileo/Kconfig create mode 100644 board/intel/galileo/MAINTAINERS create mode 100644 board/intel/galileo/Makefile create mode 100644 board/intel/galileo/galileo.c create mode 100644 board/intel/galileo/start.S create mode 100644 configs/galileo_defconfig create mode 100644 include/configs/galileo.h
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 4e0171a..7a66133 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -1,5 +1,6 @@ dtb-y += chromebook_link.dtb \ crownbay.dtb \ + galileo.dtb \ minnowmax.dtb
targets += $(dtb-y) diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts new file mode 100644 index 0000000..14a19c3 --- /dev/null +++ b/arch/x86/dts/galileo.dts @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2015, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { + model = "Intel Galileo"; + compatible = "intel,galileo", "intel,quark"; + + config { + silent_console = <0>; + }; + + chosen { + stdout-path = &pciuart0; + }; + + pci { + #address-cells = <3>; + #size-cells = <2>; + compatible = "intel,pci"; + device_type = "pci"; + + pciuart0: uart@14,5 { + compatible = "pci8086,0936.00", + "pci8086,0936", + "pciclass,070002", + "pciclass,0700", + "x86-uart"; + reg = <0x0000a500 0x0 0x0 0x0 0x0 + 0x0200a510 0x0 0x0 0x0 0x0>; + reg-shift = <2>; + clock-frequency = <44236800>; + current-speed = <115200>; + }; + }; + +}; diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig new file mode 100644 index 0000000..85afbbc --- /dev/null +++ b/board/intel/galileo/Kconfig @@ -0,0 +1,21 @@ +if TARGET_GALILEO + +config SYS_BOARD + default "galileo" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "quark" + +config SYS_CONFIG_NAME + default "galileo" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_RESET_VECTOR + select INTEL_QUARK + select BOARD_ROMSIZE_KB_1024 + +endif diff --git a/board/intel/galileo/MAINTAINERS b/board/intel/galileo/MAINTAINERS new file mode 100644 index 0000000..dbbc82e --- /dev/null +++ b/board/intel/galileo/MAINTAINERS @@ -0,0 +1,6 @@ +INTEL GALILEO BOARD +M: Bin Meng bmeng.cn@gmail.com +S: Maintained +F: board/intel/galileo/ +F: include/configs/galileo.h +F: configs/galileo_defconfig diff --git a/board/intel/galileo/Makefile b/board/intel/galileo/Makefile new file mode 100644 index 0000000..8356df1 --- /dev/null +++ b/board/intel/galileo/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2015, Bin Meng bmeng.cn@gmail.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += galileo.o start.o diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c new file mode 100644 index 0000000..f2e7468 --- /dev/null +++ b/board/intel/galileo/galileo.c @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2015, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + return 0; +} + +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) +{ + return; +} diff --git a/board/intel/galileo/start.S b/board/intel/galileo/start.S new file mode 100644 index 0000000..a71db69 --- /dev/null +++ b/board/intel/galileo/start.S @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2015, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.globl early_board_init +early_board_init: + jmp early_board_init_ret diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig new file mode 100644 index 0000000..f208651 --- /dev/null +++ b/configs/galileo_defconfig @@ -0,0 +1,6 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff10000" +CONFIG_X86=y +CONFIG_TARGET_GALILEO=y +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y +CONFIG_DEFAULT_DEVICE_TREE="galileo" diff --git a/include/configs/galileo.h b/include/configs/galileo.h new file mode 100644 index 0000000..bead2fc --- /dev/null +++ b/include/configs/galileo.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2015, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_X86_SERIAL + +/* ns16550 UART is memory-mapped in Quark SoC */ +#undef CONFIG_SYS_NS16550_PORT_MAPPED + +#define CONFIG_PCI_MEM_BUS 0x90000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x20000000 + +#define CONFIG_PCI_PREF_BUS 0xb0000000 +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS +#define CONFIG_PCI_PREF_SIZE 0x20000000 + +#define CONFIG_PCI_IO_BUS 0x2000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0xe000 + +#define CONFIG_SYS_EARLY_PCI_INIT +#define CONFIG_PCI_PNP + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +/* SATA is not supported in Quark SoC */ +#undef CONFIG_SCSI_AHCI +#undef CONFIG_CMD_SCSI + +/* Video is not supported in Quark SoC */ +#undef CONFIG_VIDEO +#undef CONFIG_CFB_CONSOLE + +#endif /* __CONFIG_H */