On Tuesday, March 31, 2015 at 11:13:54 PM, Pavel Machek wrote:
On Tue 2015-03-31 15:59:11, Dinh Nguyen wrote:
On 3/31/15 3:48 PM, Pavel Machek wrote:
On Mon 2015-03-30 17:01:18, dinguyen@opensource.altera.com wrote:
From: Dinh Nguyen dinguyen@opensource.altera.com
commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration" incorrectly set the muxing for UART0 on the Cyclone V DK.
This fixes it up so UART0 is working again.
Signed-off-by: Dinh Nguyen dinguyen@opensource.altera.com
Acked-by: Pavel Machek pavel@ucw.cz
But I guess this one should be merged ahead of the rest of series...?
Yes, this patch should get merged without the SPL.
I suggest to send it separately, or make it part 1/ of the series.
Yeah, sending unrelated patches separately so they can go in ASAP would really help. Even breaking a series into smaller chunks could help.
I applied whatever was reasonable to u-boot-socfpga/next, so you don't have to re-send the entire bulk of patches again.
Best regards, Marek Vasut