On Thursday 11 July 2013 05:28 AM, Nishanth Menon wrote:
[...]
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 338a241..2441c55 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */ {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
- {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */
- {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */
- {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */
- {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */
- {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */
- {GPMC_A18, (IEN | PDIS | M1)}, /* QSPI1_SCLK */
- {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */
- {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */
- {GPMC_CS2, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS0 */
- {GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/
Just a nitpick - Could someone audit this to ensure that only input/full duplex pins are set to IEN(Input Enable)? Chip select (CS), SCLK, RTCLK dont seem to be candidates for input to DRA.
Yes, SCLK is just an output and IEN should not be required. RTCLK is an input to qspi to synchronise the data read, so probably I should keep IEN. CS are also the outputs to slave, though I dont know why the dra data manual shows its type as IO.
Regards, Nishanth Menon