Dear Shawn,
in message c3d0340b05022510425a57a1a1@mail.gmail.com you wrote:
Before board_init_f() is called, which is C code, a stack must be set up. The stack is usually set up in internal SRAM. Where shall I put stack in if I don't have an internal SRAM?
Which part of section "Initial Stack, Global Data" in the README don't you understand?
I read through cpu/ppc4xx/start.S and found some set up the temporary stack in DCACHE (Walnut 405 is an example). But the CFG_INIT_RAM_ADDR is 0x40000000, which is inside SDRAM. Why was it commented that the
No, this is not inside SDRAM. There is no board (yet) with 1 GB of RAM.
stack was set in DCACHE? I don't quite understand how a cache acts
Because the stack is in the data cache.
like RAM, i.e., a cache can be accessed by address xxxx_xxxx. Is a cache only accessible by special cache instructions? The following
I'm afraid that explaining the basic operations of cache is beyond the topics for this mailing list.
In short: cache is like normal memory, just very fast (which does not play a role here). We just have to make sure that no cache fills or cache flushes will be done (at least not for that part of the data cache which is being used for the initial stack).
Best regards,
Wolfgang Denk