From: Thierry Reding treding@nvidia.com
This reset is required for PCIe and the corresponding ID therefore needs to be defined.
Signed-off-by: Thierry Reding treding@nvidia.com --- arch/arm/cpu/tegra20-common/clock.c | 4 ++-- arch/arm/cpu/tegra30-common/clock.c | 1 + arch/arm/include/asm/arch-tegra20/clock-tables.h | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/tegra20-common/clock.c b/arch/arm/cpu/tegra20-common/clock.c index d55fbc87c340..7b9e10cd93ae 100644 --- a/arch/arm/cpu/tegra20-common/clock.c +++ b/arch/arm/cpu/tegra20-common/clock.c @@ -333,7 +333,7 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = { /* 0x48 */ NONE(AFI), NONE(CORESIGHT), - NONE(RESERVED74), + NONE(PCIEXCLK), NONE(AVPUCQ), NONE(RESERVED76), NONE(RESERVED77), @@ -495,7 +495,7 @@ enum periph_id clk_id_to_periph_id(int clk_id) case PERIPH_ID_RESERVED30: case PERIPH_ID_RESERVED35: case PERIPH_ID_RESERVED56: - case PERIPH_ID_RESERVED74: + case PERIPH_ID_PCIEXCLK: case PERIPH_ID_RESERVED76: case PERIPH_ID_RESERVED77: case PERIPH_ID_RESERVED78: diff --git a/arch/arm/cpu/tegra30-common/clock.c b/arch/arm/cpu/tegra30-common/clock.c index 8e5c49888219..0eb0f0ade37c 100644 --- a/arch/arm/cpu/tegra30-common/clock.c +++ b/arch/arm/cpu/tegra30-common/clock.c @@ -564,6 +564,7 @@ enum periph_id clk_id_to_periph_id(int clk_id) case PERIPH_ID_RESERVED43: case PERIPH_ID_RESERVED45: case PERIPH_ID_RESERVED56: + case PERIPH_ID_PCIEXCLK: case PERIPH_ID_RESERVED76: case PERIPH_ID_RESERVED77: case PERIPH_ID_RESERVED78: diff --git a/arch/arm/include/asm/arch-tegra20/clock-tables.h b/arch/arm/include/asm/arch-tegra20/clock-tables.h index a09cb0197863..894be088cde2 100644 --- a/arch/arm/include/asm/arch-tegra20/clock-tables.h +++ b/arch/arm/include/asm/arch-tegra20/clock-tables.h @@ -131,7 +131,7 @@ enum periph_id { /* 72 */ PERIPH_ID_AFI, PERIPH_ID_CORESIGHT, - PERIPH_ID_RESERVED74, + PERIPH_ID_PCIEXCLK, PERIPH_ID_AVPUCQ, PERIPH_ID_RESERVED76, PERIPH_ID_RESERVED77,