On Wed, Jan 09, 2008 at 09:11:42AM -0600, Timur Tabi wrote:
Anton Vorontsov wrote:
To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should be set up appropriately.
On 83xx, the pario pins are configured via the DTS.
And this is wrong way to do pario setup. This was discussed already, and the argument is "device tree isn't configuration file. fix the firmware, and if needed place temporary fixups into the Linux board file".
By the way, I was disagreeing and arguing about that too. ;-)
See: http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040601.html http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040691.html [and more...]
Though there we're discussing GPIOs, but it is more than applicable to par io configuration, i.e. setting up pins' dedicated functions.
Also see documentation update: http://ozlabs.org/pipermail/linuxppc-dev/2008-January/049418.html
So now we have the DTS method for 83xx, and U-Boot for 85xx. Unless there's a U-Boot QE UART driver that I don't know about, this configuration should be done in the DTS, not here.
UART1 on MPC8568E-MDS is second DUART, not QE UART. Though Second DUART is using QE Par I/O pins.
Thanks,