11 Sep
2018
11 Sep
'18
2:25 p.m.
On Thu, Aug 09, 2018 at 11:57:57AM +0200, Patrice Chotard wrote:
Replace clrsetbits on ODR register (2 operations: one read + one write) by writing on the correct bit (SET or RESET) of the BSRR register (only 1 write operation).
Moreover this register if safe for simultaneous access by 2 master on the bus.
Signed-off-by: Patrick Delaunay patrick.delaunay@st.com Signed-off-by: Patrice Chotard patrice.chotard@st.com
Applied to u-boot/master, thanks!
--
Tom