Re: [U-Boot] [PATCH 4/4] spi: mxc_spi: Fix spi clock glitch durant reset

On 15/11/2012 22:23, Fabio Estevam wrote:

From: Fabio Estevam fabio.estevam@freescale.com

Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi.

Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable.

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com

drivers/spi/mxc_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 4bed4f0..102fca5 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -140,8 +140,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, reg_ctrl = reg_read(&regs->ctrl);

/* Reset spi */

• reg_write(&regs->ctrl, 0);
• reg_write(&regs->ctrl, (reg_ctrl | 0x1));

• reg_write(&regs->ctrl, (reg_ctrl & ~MXC_CSPICTRL_EN));
• reg_write(&regs->ctrl, (reg_ctrl | MXC_CSPICTRL_EN));

Right - the enabled was set after clearing the register, but before setting it.

Acked-by: Stefano Babic sbabic@denx.de

Best regards, Stefano Babic