Re: [U-Boot] [Patch V2 2/4] armv8/ls1043ardb: dts: add dtb support

-----Original Message----- From: Wood Scott-B07421 Sent: Thursday, November 05, 2015 7:51 AM To: Gong Qianyu-B52263 Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou Zhiqiang-B48286; Xie Shaohui-B21989; Song Wenbin-B53747; Wood Scott- B07421; Kushwaha Prabhakar-B32579 Subject: Re: [Patch V2 2/4] armv8/ls1043ardb: dts: add dtb support

On Mon, 2015-11-02 at 19:15 +0800, Gong Qianyu wrote:

...

Reuse dts files from ls1043a linux kernel. Some parts in dts files may not be needed by U-Boot.

Signed-off-by: Gong Qianyu Qianyu.Gong@freescale.com

V2:

• New Patch.

arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1043a-rdb.dts | 169 +++++++++++++++++++ arch/arm/dts/fsl-ls1043a.dtsi | 346 +++++++++++++++++++++++++++++++++++++++ configs/ls1043ardb_defconfig | 2 + 4 files changed, 518 insertions(+)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ddc6a05..3f3a739 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -83,6 +83,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ ls1021a-twr.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2085a-qds.dtb \ fsl-ls2085a-rdb.dtb +dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-rdb.dtb

dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-a1000.dtb \ diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a- rdb.dts new file mode 100644 index 0000000..51b5e9f --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-rdb.dts @@ -0,0 +1,169 @@ +/*

• • Device Tree Include file for Freescale Layerscape-1043A family SoC.
• • Copyright (C) 2015, Freescale Semiconductor
• • Mingkai Hu Mingkai.hu@freescale.com
• • This file is licensed under the terms of the GNU General Public
• • License version 2. This program is licensed "as is" without any
• • warranty of any kind, whether express or implied.
• */

+/dts-v1/; +/include/ "fsl-ls1043a.dtsi"

+/ {

• model = "LS1043A RDB Board";
  

+};

+&i2c0 {

• status = "okay";
  

•  ina220@40{
  

•         compatible = "ti,ina220";
  

•         reg = <0x40>;
  

•         shunt-resistor = <1000>;
  

• };
  

•  adt7461a@4c{
  

•         compatible = "adt7461a";
  

•         reg = <0x4c>;
  

• };
  

•  eeprom@56{
  

•         compatible = "at24,24c512";
  

•         reg = <0x52>;
  

• };
  

•  eeprom@57{
  

•         compatible = "at24,24c512";
  

•         reg = <0x53>;
  

• };
  

•  rtc@68{
  

•         compatible = "pericom,pt7c4338";
  

•         reg = <0x68>;
  

• };
  

+};

+&ifc {

• status = "okay";
  

• #address-cells = <2>;
  

• #size-cells = <1>;
  

• /* NOR, NAND Flashes and FPGA on board */
  

• ranges = <0x0 0x0 0x0 0x60000000 0x08000000
  

•           0x2 0x0 0x0 0x7e800000 0x00010000
  

•           0x3 0x0 0x0 0x7fb00000 0x00000100>;
  

•         nor@0,0 {
  

•                 compatible = "cfi-flash";
  

•                 #address-cells = <1>;
  

•                 #size-cells = <1>;
  

•                 reg = <0x0 0x0 0x8000000>;
  

•                 bank-width = <2>;
  

•                 device-width = <1>;
  

•                  partition@0{
  

•                         /* 1MB for RCW and PBI Image */
  

•                         reg = <0x00000000 0x00100000>;
  

•                         label = "NOR bank0 RCW Image";
  

•                 };
  

•                  partition@100000{
  

•                         /* 1MB for bank0 u-boot Image */
  

•                         reg = <0x00100000 0x00100000>;
  

•                         label = "NOR bank0 U-Boot Image";
  

•                 };
  

•                  partition@200000{
  

•                         /* 1 MB for bank0 u-boot Env */
  

•                         reg = <0x00200000 0x00100000>;
  

•                         label = "NOR bank0 U-Boot Env";
  

•                 };
  

•                  partition@300000{
  

•                         /* 1MB for FMan ucode */
  

•                         reg = <0x00300000 0x00100000>;
  

•                         label = "NOR bank0 FMan ucode";
  

•                 };
  

•                  partition@1100000{
  

•                         /* 40MB for bank0 FIT Image */
  

•                         reg = <0x01100000 0x2800000>;
  

•                         label = "NOR bank0 FIT Image";
  

•                 };
  

•                  partition@4000000{
  

•                         /* 1MB for bank4 RCW and PBI Image */
  

•                         reg = <0x04000000 0x100000>;
  

•                         label = "NOR bank4 RCW Image";
  

•                 };
  

•                  partition@4100000{
  

•                         /* 1MB for bank4 u-boot Image */
  

•                         reg = <0x04100000 0x100000>;
  

•                         label = "NOR bank4 U-Boot Image";
  

•                 };
  

•                  partition@4200000{
  

•                         /* 1 MB for bank4 u-boot Env */
  

•                         reg = <0x04200000 0x100000>;
  

•                         label = "NOR bank4 U-Boot Env";
  

•                 };
  

•                  partition@4300000{
  

•                         /* 1 MB for bank4 FMan ucode */
  

•                         reg = <0x04300000 0x100000>;
  

•                         label = "NOR bank4 FMan ucode";
  

•                 };
  

•                  partition@5100000{
  

•                         /* 40MB for bank4 FIT Image */
  

•                         reg = <0x05100000 0x2800000>;
  

•                         label = "NOR bank4 FIT Image";
  

•                 };
  

•         };
  

•         nand@1,0 {
  

•                 compatible = "fsl,ifc-nand";
  

•                 #address-cells = <1>;
  

•                 #size-cells = <1>;
  

•                 reg = <0x2 0x0 0x10000>;
  

•                  partition@0{
  

•                         /* This location must not be altered  */
  

•                         /* 1MB for u-boot Bootloader Image */
  

•                         reg = <0x0 0x00100000>;
  

•                         label = "NAND U-Boot Image";
  

•                         read-only;
  

•                 };
  

•                  partition@140000{
  

•                         /* 1MB for DTB Image */
  

•                         reg = <0x00140000 0x002000>;
  

•                         label = "NAND U-Boot Env";
  

•                 };
  

•                  partition@200000{
  

•                         /* 20MB for FIT Image */
  

•                         reg = <0x00200000 0x01400000>;
  

•                         label = "NAND FIT Image";
  

•                 };
  

•         };
  

Why are the partitions defined here rather than in an environment variable?

...

• clockgen:  clocking@1ee1000{
  

•         ranges = <0x0 0x0 0x1ee1000 0x1000>;
  

•         #address-cells = <1>;
  

•         #size-cells = <1>;
  

•         sysclk: sysclk {
  

•                 compatible = "fixed-clock";
  

•                 #clock-cells = <0>;
  

•                 clock-frequency = <100000000>;
  

•                 clock-output-names = "sysclk";
  

•         };
  

•         cga_pll1:  pll1@800{
  

•                 compatible = "fsl,qoriq-core-pll-2.0";
  

•                 #clock-cells = <1>;
  

•                 reg = <0x800 0x10>;
  

•                 clocks = <&sysclk>;
  

•                 clock-output-names = "cga-pll1", "cga-pll1-div2",
  

•                                 "cga-pll1-div3", "cga-pll1-div4";
  

•         };
  

•         cga_pll2:  pll2@820{
  

•                 compatible = "fsl,qoriq-core-pll-2.0";
  

•                 #clock-cells = <1>;
  

•                 reg = <0x820 0x10>;
  

•                 clocks = <&sysclk>;
  

•                 clock-output-names = "cga-pll2", "cga-pll2-div2",
  

•                                 "cga-pll2-div3", "cga-pll2-div4";
  

•         };
  

•         platform_clk:  pll@c00{
  

•                 compatible = "fsl,qoriq-core-pll-2.0";
  

•                 #clock-cells = <1>;
  

•                 reg = <0xc00 0x10>;
  

•                 clocks = <&sysclk>;
  

•                 clock-output-names = "platform-clk", "platform-
  

clk-div2";

...

•         };
  

•         cluster1_clk:  clk0c0@0{
  

•                 compatible = "fsl,qoriq-core-mux-2.0";
  

•                 #clock-cells = <0>;
  

•                 reg = <0x0 0x10>;
  

•                 clock-names = "pll1cga", "pll1cga-div2",
  

"pll1cga-div4",

...

•                               "pll2cga", "pll2cga-div2",
  

"pll2cga-div4";

...

•                 clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1
  

2>,

...

•                          <&cga_pll2 0>, <&cga_pll2 1>, <&cga_pll2
  

2>;

...

•                 clock-output-names = "cluster1-clk";
  

•         };
  

• };
  

This binding is deprecated. Please don't add any more users of it (especially broken users that lack compatible, reg, etc), and more generally please use the latest version of the Linux ls1043a device tree rather than things that have never been accepted in upstream Linux.

-Scott

OK. I will update the dts according to the upstreaming ls1043a kernel dts. Thanks for your review.

Regards, Qianyu