
Thank you Pratyush,
I'm not a regular submitter so appreciate the feedback. Looking at denx.de/wiki/U-Boot/Patches I saw:
Tested-by: A Tested-by: tag indicates that the patch has been successfully tested (in some environment) by the person named. Andrew Morton: "I think it's very useful information to have. For a start, it tells you who has the hardware and knows how to build a kernel. So if you're making a change to a driver and want it tested, you can troll the file's changelog looking for people who might be able to help."
Totally appreciate that this is inferred by the change - thanks also for the maintainer advice.
Regards Kris
On 19/10/2021 19:38, Pratyush Yadav wrote:
On 18/10/21 03:30AM, Kris Chaplin wrote:
The mt25qu512a supports 4K or 64K sectors, so adding SECT_4K to enable 4K sector usage.
Datasheet: https://media-www.micron.com/-/media/client/global/documents/products/data-s...
Tested on Intel n5x hardware with QSPI carrier card
Signed-off-by: Kris Chaplin kris.chaplin@linux.intel.com Tested by: Kris Chaplin kris.chaplin@linux.intel.com
This is unusual. The patch should *always* be tested by the author so you don't really need a Tested-by from the author. It is implied.
You should also Cc the subsystem maintainers so that they can see the patch and review and apply it. You can use `./scripts/get_maintainer.pl <patch_file.patch>` to get the list of people who need to be in Cc. Adding Jagan and Vignesh for this patch.
Anyway, with the Tested-by trailer dropped,
Acked-by: Pratyush Yadav p.yadav@ti.com
drivers/mtd/spi/spi-nor-ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index f0c8041997..5359d09489 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -190,7 +190,7 @@ const struct flash_info spi_nor_ids[] = { { INFO6("mt25qu256a", 0x20bb19, 0x104400, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) }, { INFO("n25q256ax1", 0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | USE_FSR) }, { INFO6("mt25qu512a", 0x20bb20, 0x104400, 64 * 1024, 1024,
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
USE_FSR) }, { INFO("n25q512a", 0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { INFO6("mt25ql512a", 0x20ba20, 0x104400, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
-- 2.25.1