Add support for HSSPI controller in ARMv7 chip dts files.
Port from linux patch: Link: https://lore.kernel.org/r/20230207065826.285013-4-william.zhang@broadcom.com
Signed-off-by: William Zhang william.zhang@broadcom.com ---
arch/arm/dts/bcm47622.dtsi | 18 ++++++++++++++++++ arch/arm/dts/bcm63138.dtsi | 18 ++++++++++++++++++ arch/arm/dts/bcm63148.dtsi | 18 ++++++++++++++++++ arch/arm/dts/bcm63178.dtsi | 19 +++++++++++++++++++ arch/arm/dts/bcm6756.dtsi | 19 +++++++++++++++++++ arch/arm/dts/bcm6846.dtsi | 18 ++++++++++++++++++ arch/arm/dts/bcm6855.dtsi | 27 +++++++++++++++++++-------- arch/arm/dts/bcm6878.dtsi | 19 +++++++++++++++++++ arch/arm/dts/bcm947622.dts | 4 ++++ arch/arm/dts/bcm963138.dts | 4 ++++ arch/arm/dts/bcm963148.dts | 4 ++++ arch/arm/dts/bcm963178.dts | 4 ++++ arch/arm/dts/bcm96756.dts | 4 ++++ arch/arm/dts/bcm96846.dts | 4 ++++ arch/arm/dts/bcm96855.dts | 4 ++++ arch/arm/dts/bcm96878.dts | 4 ++++ 16 files changed, 180 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/bcm47622.dtsi b/arch/arm/dts/bcm47622.dtsi index c016e12b7372..86b1dff65aca 100644 --- a/arch/arm/dts/bcm47622.dtsi +++ b/arch/arm/dts/bcm47622.dtsi @@ -83,6 +83,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -114,6 +120,18 @@ #size-cells = <1>; ranges = <0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm47622-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm63138.dtsi b/arch/arm/dts/bcm63138.dtsi index 42b442aec9f4..2a673c39ba68 100644 --- a/arch/arm/dts/bcm63138.dtsi +++ b/arch/arm/dts/bcm63138.dtsi @@ -60,6 +60,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; };
/* ARM bus */ @@ -145,5 +151,17 @@ clock-names = "refclk"; status = "disabled"; }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63138-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/bcm63148.dtsi b/arch/arm/dts/bcm63148.dtsi index df5307b6b3af..d9aed2bd7ff0 100644 --- a/arch/arm/dts/bcm63148.dtsi +++ b/arch/arm/dts/bcm63148.dtsi @@ -59,6 +59,12 @@ #clock-cells = <0>; clock-frequency = <50000000>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; };
psci { @@ -99,5 +105,17 @@ clock-names = "refclk"; status = "disabled"; }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63148-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/bcm63178.dtsi b/arch/arm/dts/bcm63178.dtsi index cbd094dde6d0..4c94d62e1a21 100644 --- a/arch/arm/dts/bcm63178.dtsi +++ b/arch/arm/dts/bcm63178.dtsi @@ -70,6 +70,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -77,6 +78,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -108,6 +115,18 @@ #size-cells = <1>; ranges = <0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63178-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm6756.dtsi b/arch/arm/dts/bcm6756.dtsi index ce1b59faf800..cfabd22b0251 100644 --- a/arch/arm/dts/bcm6756.dtsi +++ b/arch/arm/dts/bcm6756.dtsi @@ -87,6 +87,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -118,6 +124,19 @@ #size-cells = <1>; ranges = <0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1"; + reg = <0x1000 0x600>, <0x2610 0x4>; + reg-names = "hsspi", "spim-ctrl"; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm6846.dtsi b/arch/arm/dts/bcm6846.dtsi index 8aa47a2583b2..05e5870474b0 100644 --- a/arch/arm/dts/bcm6846.dtsi +++ b/arch/arm/dts/bcm6846.dtsi @@ -60,6 +60,12 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; };
psci { @@ -99,5 +105,17 @@ clock-names = "refclk"; status = "disabled"; }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6846-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/bcm6855.dtsi b/arch/arm/dts/bcm6855.dtsi index 10c003a57c95..59680a9aa2f5 100644 --- a/arch/arm/dts/bcm6855.dtsi +++ b/arch/arm/dts/bcm6855.dtsi @@ -81,14 +81,6 @@ clock-mult = <1>; };
- hsspi_pll: hsspi-pll { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clocks = <&periph_clk>; - clock-mult = <2>; - clock-div = <1>; - }; - wdt_clk: wdt-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -96,6 +88,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -128,6 +126,19 @@ ranges = <0 0xff800000 0x800000>; bootph-all;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6855-hsspi", "brcm,bcmbca-hsspi-v1.1"; + reg = <0x1000 0x600>, <0x2610 0x4>; + reg-names = "hsspi", "spim-ctrl"; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm6878.dtsi b/arch/arm/dts/bcm6878.dtsi index 1e8b5fa96c25..ab08d2662162 100644 --- a/arch/arm/dts/bcm6878.dtsi +++ b/arch/arm/dts/bcm6878.dtsi @@ -60,6 +60,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -67,6 +68,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -99,6 +106,18 @@ #size-cells = <1>; ranges = <0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6878-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm947622.dts b/arch/arm/dts/bcm947622.dts index 6f083724ab8e..93b8ce22678d 100644 --- a/arch/arm/dts/bcm947622.dts +++ b/arch/arm/dts/bcm947622.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm963138.dts b/arch/arm/dts/bcm963138.dts index 6158a8733554..b3c57e6efc25 100644 --- a/arch/arm/dts/bcm963138.dts +++ b/arch/arm/dts/bcm963138.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm963148.dts b/arch/arm/dts/bcm963148.dts index 98f6a6d09f50..1f5d6d783f09 100644 --- a/arch/arm/dts/bcm963148.dts +++ b/arch/arm/dts/bcm963148.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm963178.dts b/arch/arm/dts/bcm963178.dts index fa096e9cde23..d036e99dd8d1 100644 --- a/arch/arm/dts/bcm963178.dts +++ b/arch/arm/dts/bcm963178.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96756.dts b/arch/arm/dts/bcm96756.dts index 9a4a87ba9c8a..8b104f3fb14a 100644 --- a/arch/arm/dts/bcm96756.dts +++ b/arch/arm/dts/bcm96756.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96846.dts b/arch/arm/dts/bcm96846.dts index c70ebccabc19..55852c229608 100644 --- a/arch/arm/dts/bcm96846.dts +++ b/arch/arm/dts/bcm96846.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96855.dts b/arch/arm/dts/bcm96855.dts index e4e740c73e97..cac2a40ef5c1 100644 --- a/arch/arm/dts/bcm96855.dts +++ b/arch/arm/dts/bcm96855.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96878.dts b/arch/arm/dts/bcm96878.dts index 8fbc175cb452..b7af8ade7a9d 100644 --- a/arch/arm/dts/bcm96878.dts +++ b/arch/arm/dts/bcm96878.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +};