Re: [U-Boot-Users] [PATCH 9/9] Add support for Korat PPC440EPx board

27 Dec 2007

On Saturday 22 December 2007, Larry Johnson wrote:
...
These patches add support for the PPC440EPx-based "Korat" board to
U-Boot.  They are based primarily on support for the Sequoia board.
Signed-off-by: Larry Johnson lrj@acm.org
MAINTAINERS            |    4 +
 MAKEALL                |    1 +
 Makefile               |    3 +
 board/korat/Makefile   |   51 ++++
 board/korat/config.mk  |   37 +++
 board/korat/init.S     |   80 +++++
 board/korat/korat.c    |  761
++++++++++++++++++++++++++++++++++++++++++++++++ board/korat/u-boot.lds | 
145 +++++++++
 8 files changed, 1082 insertions(+), 0 deletions(-)
 create mode 100644 board/korat/Makefile
 create mode 100644 board/korat/config.mk
 create mode 100644 board/korat/init.S
 create mode 100644 board/korat/korat.c
 create mode 100644 board/korat/u-boot.lds

diff --git a/MAINTAINERS b/MAINTAINERS
index bf0ebb1..0238d2e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -204,6 +204,10 @@ Murray Jensen Murray.Jensen@csiro.au
   cogent_mpc8260		MPC8260
   hymod			MPC8260
+Larry Johnson lrj@acm.org


korat			PPC440EPx


Brad Kemp Brad.Kemp@seranoa.com
ppmc8260		MPC8260
diff --git a/MAKEALL b/MAKEALL
index fb53a91..97e3891 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx="		\
   katmai		\
   kilauea		\
   kilauea_nand	\

korat		\
luan		\
lwmon5		\
makalu		\

diff --git a/Makefile b/Makefile
index c73d4cf..c127bcf 100644
--- a/Makefile
+++ b/Makefile
@@ -1231,6 +1231,9 @@ haleakala_nand_config: unconfig
   @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp
   @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+korat_config:	unconfig

@$(MKCONFIG) $(@:_config=) ppc ppc4xx korat


luan_config:	unconfig
   @$(MKCONFIG) $(@:_config=) ppc ppc4xx luan amcc
diff --git a/board/korat/Makefile b/board/korat/Makefile
new file mode 100644
index 0000000..fa19e6f
--- /dev/null
+++ b/board/korat/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2002-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#



+include $(TOPDIR)/config.mk



+LIB	= $(obj)lib$(BOARD).a



+COBJS	= $(BOARD).o
+SOBJS	= init.o



+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))



+$(LIB):	$(OBJS) $(SOBJS)

$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)


+clean:

rm -f $(SOBJS) $(OBJS)


+distclean:	clean

rm -f $(LIB) core *.bak .depend


+#########################################################################



+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk



+sinclude $(obj).depend



+#########################################################################
diff --git a/board/korat/config.mk b/board/korat/config.mk
new file mode 100644
index 0000000..39966e0
--- /dev/null
+++ b/board/korat/config.mk
@@ -0,0 +1,37 @@
+#
+# (C) Copyright 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# Korat (PPC440EPx) board
+#



+TEXT_BASE = 0xFFFA0000



+PLATFORM_CPPFLAGS += -DCONFIG_440=1



+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif



+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
+endif
diff --git a/board/korat/init.S b/board/korat/init.S
new file mode 100644
index 0000000..bd0e8b4
--- /dev/null
+++ b/board/korat/init.S
@@ -0,0 +1,80 @@
+/*






See file CREDITS for list of people who contributed to this



project.







This program is free software; you can redistribute it and/or



modify it under the terms of the GNU General Public License as



published by the Free Software Foundation; either version 2 of



the License, or (at your option) any later version.







This program is distributed in the hope that it will be useful,



but WITHOUT ANY WARRANTY; without even the implied warranty of



MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the



GNU General Public License for more details.







You should have received a copy of the GNU General Public License



along with this program; if not, write to the Free Software



Foundation, Inc., 59 Temple Place, Suite 330, Boston,



MA 02111-1307 USA


*/


+#include <ppc_asm.tmpl>
+#include <asm-ppc/mmu.h>
+#include <config.h>



+/*************************************************************************



TLB TABLE











This table is used by the cpu boot code to setup the initial tlb



entries. Rather than make broad assumptions in the cpu source tree,



this table lets each board set things up however they like.







Pointer to the table is returned in r1








*************************************************************************/

.section .bootpg,"ax"
.globl tlbtab


+tlbtab:

tlbtab_start

/*
* BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to



use the +	 * speed up boot process. It is patched after relocation to
enable SA_I +	 */

tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1,

AC_R|AC_W|AC_X|SA_G ) +

/*
* TLB entries for SDRAM are not needed on this platform.  They are


* generated dynamically in the SPD DDR2 detection routine.


*/




+#ifdef CFG_INIT_RAM_DCACHE

/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0,

AC_R|AC_W|AC_X|SA_G ) +#endif


/* TLB-entry for PCI Memory */
tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 1,

AC_R|AC_W|SA_G|SA_I ) +	tlbentry( CFG_PCI_MEMBASE1, SZ_256M,
CFG_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I ) +	tlbentry( CFG_PCI_MEMBASE2,
SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I ) +	tlbentry(
CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I ) +

/* TLB-entry for EBC */
tlbentry( CFG_CPLD_BASE, SZ_1K, CFG_CPLD_BASE, 1, AC_R|AC_W|SA_G|SA_I )

/* TLB-entry for Internal Registers & OCM */
/* I wonder why this must be executable -- lrj@acm.org 2007-10-08 */
tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0,  AC_R|AC_W|AC_X|SA_I )

/*TLB-entry PCI registers*/
tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1,  AC_R|AC_W|SA_G|SA_I )

/* TLB-entry for peripherals */
tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|SA_G|SA_I)

/* TLB-entry PCI IO Space - from sr@denx.de */
tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|SA_G|SA_I)

tlbtab_end

diff --git a/board/korat/korat.c b/board/korat/korat.c
new file mode 100644
index 0000000..7cb9ee1
--- /dev/null
+++ b/board/korat/korat.c
@@ -0,0 +1,761 @@
+/*


(C) Copyright 2007



Larry Johnson, lrj@acm.org







(C) Copyright 2006



Stefan Roese, DENX Software Engineering, sr@denx.de.







(C) Copyright 2006



Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com



Alain Saurel,	    AMCC/IBM, alain.saurel@fr.ibm.com







This program is free software; you can redistribute it and/or



modify it under the terms of the GNU General Public License as



published by the Free Software Foundation; either version 2 of



the License, or (at your option) any later version.







This program is distributed in the hope that it will be useful,



but WITHOUT ANY WARRANTY; without even the implied warranty of



MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the



GNU General Public License for more details.







You should have received a copy of the GNU General Public License



along with this program; if not, write to the Free Software



Foundation, Inc., 59 Temple Place, Suite 330, Boston,



MA 02111-1307 USA


*/


+#include <common.h>
+#include <asm/processor.h>
+#include <asm-ppc/io.h>
+#include <i2c.h>
+#include <ppc440.h>



+DECLARE_GLOBAL_DATA_PTR;



+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH
chips    */ +
+ulong flash_get_size(ulong base, int banknum);



+int board_early_init_f(void)
+{

u32 sdr0_pfc1, sdr0_pfc2;
u32 gpio0_ir;
u32 reg;
int eth;

mtdcr(ebccfga, xbcfg);
mtdcr(ebccfgd, 0xb8400000);

/*--------------------------------------------------------------------
* Setup the GPIO pins


*


* Korat GPIO usage:


*


*                   Init.


* Pin    Source I/O value Function


* ------ ------ --- ----- ---------------------------------


* GPIO00  Alt1  I/O   x   PerAddr07


* GPIO01  Alt1  I/O   x   PerAddr06


* GPIO02  Alt1  I/O   x   PerAddr05


* GPIO03  GPIO   x    x   GPIO03 to expansion bus connector


* GPIO04  GPIO   x    x   GPIO04 to expansion bus connector


* GPIO05  GPIO   x    x   GPIO05 to expansion bus connector


* GPIO06  Alt1   O    x   PerCS1 (2nd NOR flash)


* GPIO07  Alt1   O    x   PerCS2 (CPLD)


* GPIO08  Alt1   O    x   PerCS3 to expansion bus connector


* GPIO09  Alt1   O    x   PerCS4 to expansion bus connector


* GPIO10  Alt1   O    x   PerCS5 to expansion bus connector


* GPIO11  Alt1   I    x   PerErr


* GPIO12  GPIO   O    0   ATMega !Reset


* GPIO13  GPIO   O    1   SPI Atmega !SS


* GPIO14  GPIO   O    1   Write protect EEPROM #1 (0xA8)


* GPIO15  GPIO   O    0   CPU Run LED !On


* GPIO16  Alt1   O    x   GMC1TxD0


* GPIO17  Alt1   O    x   GMC1TxD1


* GPIO18  Alt1   O    x   GMC1TxD2


* GPIO19  Alt1   O    x   GMC1TxD3


* GPIO20  Alt1   O    x   RejectPkt0


* GPIO21  Alt1   O    x   RejectPkt1


* GPIO22  GPIO   I    x   PGOOD_DDR


* GPIO23  Alt1   O    x   SCPD0


* GPIO24  Alt1   O    x   GMC0TxD2


* GPIO25  Alt1   O    x   GMC0TxD3


* GPIO26  GPIO? I/O   x   IIC0SDA (selected in SDR0_PFC4)


* GPIO27  GPIO   O    0   PHY #0 1000BASE-X


* GPIO28  GPIO   O    0   PHY #1 1000BASE-X


* GPIO29  GPIO   I    x   Test jumper !Present


* GPIO30  GPIO   I    x   SFP module #0 !Present


* GPIO31  GPIO   I    x   SFP module #1 !Present


*


* GPIO32  GPIO   O    1   SFP module #0 Tx !Enable


* GPIO33  GPIO   O    1   SFP module #1 Tx !Enable


* GPIO34  Alt2   I    x   !UART1_CTS


* GPIO35  Alt2   O    x   !UART1_RTS


* GPIO36  Alt1   I    x   !UART0_CTS


* GPIO37  Alt1   O    x   !UART0_RTS


* GPIO38  Alt2   O    x   UART1_Tx


* GPIO39  Alt2   I    x   UART1_Rx


* GPIO40  Alt1   I    x   IRQ0 (Ethernet 0)


* GPIO41  Alt1   I    x   IRQ1 (Ethernet 1)


* GPIO42  Alt1   I    x   IRQ2 (PCI interrupt)


* GPIO43  Alt1   I    x   IRQ3 (System Alert from CPLD)


* GPIO44  xxxx   x    x   (grounded through pulldown)


* GPIO45  GPIO   O    0   PHY #0 Enable


* GPIO46  GPIO   O    0   PHY #1 Enable


* GPIO47  GPIO   I    x   Reset switch !Pressed


* GPIO48  GPIO   I    x   Shutdown switch !Pressed


* GPIO49  xxxx   x    x   (reserved for trace port)


*   .      .     .    .               .


*   .      .     .    .               .


*   .      .     .    .               .


* GPIO63  xxxx   x    x   (reserved for trace port)


*-------------------------------------------------------------------*/



out_be32((u32 *) GPIO0_OR, 0x00060000);
out_be32((u32 *) GPIO1_OR, 0xC0000000);

out_be32((u32 *) GPIO0_OSRL, 0x54055400);
out_be32((u32 *) GPIO0_OSRH, 0x55015000);
out_be32((u32 *) GPIO1_OSRL, 0x02180000);
out_be32((u32 *) GPIO1_OSRH, 0x00000000);

out_be32((u32 *) GPIO0_TSRL, 0x54055500);
out_be32((u32 *) GPIO0_TSRH, 0x00015000);
out_be32((u32 *) GPIO1_TSRL, 0x00000000);
out_be32((u32 *) GPIO1_TSRH, 0x00000000);

out_be32((u32 *) GPIO0_TCR, 0x000FF0D8);
out_be32((u32 *) GPIO1_TCR, 0xD6060000);

out_be32((u32 *) GPIO0_ISR1L, 0x54000100);
out_be32((u32 *) GPIO0_ISR1H, 0x00500000);
out_be32((u32 *) GPIO1_ISR1L, 0x00405500);
out_be32((u32 *) GPIO1_ISR1H, 0x00000000);

out_be32((u32 *) GPIO0_ISR2L, 0x00000000);
out_be32((u32 *) GPIO0_ISR2H, 0x00000000);
out_be32((u32 *) GPIO1_ISR2L, 0x04010000);
out_be32((u32 *) GPIO1_ISR2H, 0x00000000);

out_be32((u32 *) GPIO0_ISR3L, 0x00000000);
out_be32((u32 *) GPIO0_ISR3H, 0x00000000);
out_be32((u32 *) GPIO1_ISR3L, 0x00000000);
out_be32((u32 *) GPIO1_ISR3H, 0x00000000);

Just for your information: The LWMON5 has a complete GPIO setup via the 
CFG_4xx_GPIO_TABLE define in the board config file. This is much easier to 
maintain. I suggest you change this GPIO configuration at some time to use 
this method. For now I will accept this version since it is tested.
And yes, this should be done for Sequoia too at some time. Patches as always 
welcome. ;)
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office@denx.de
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