
25 Jun
2020
25 Jun
'20
10:04 a.m.
Ășt 12. 5. 2020 v 8:48 odesĂlatel Michal Simek michal.simek@xilinx.com napsal:
Hi,
this patchset is adding support for AES support.
Thanks, Michal
Ibai Erkiaga (1): fpga: zynqpl: Check if aes engine is enabled
Siva Durga Prasad Paladugu (1): fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
T Karthik Reddy (3): fpga: zynqpl: Check fpga config completion fpga: zynqpl: Flush dcache only for non-bitstream data fpga: zynqpl: Add zynq aes load & loadp commands
board/xilinx/zynq/cmds.c | 54 +++++++++++++++++++++++++++++----------- drivers/fpga/zynqpl.c | 39 +++++++++++++++++++++++------ include/zynqpl.h | 3 ++- 3 files changed, 74 insertions(+), 22 deletions(-)
-- 2.26.2
Applied all. M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs