Hi Tom,
On Fri, 13 Dec 2024 at 10:07, Tom Rini trini@konsulko.com wrote:
On Fri, Dec 13, 2024 at 07:32:24AM -0700, Simon Glass wrote:
Hi Tom,
On Thu, 12 Dec 2024 at 08:11, Tom Rini trini@konsulko.com wrote:
Introduce an option to control if we expect that a prior stage has created a bloblist already and thus it is safe to scan the address. We need to have this be configurable because we do not (and cannot) know
if
the address at CONFIG_BLOBLIST_ADDR is in regular DRAM or some special on-chip memory and so it may or may not be safe to read from this address this early.
Signed-off-by: Tom Rini trini@konsulko.com
Cc: Simon Glass sjg@chromium.org
common/Kconfig | 32 ++++++++++++++++++++++++++++++++ lib/fdtdec.c | 11 +++-------- 2 files changed, 35 insertions(+), 8 deletions(-)
Since this is the essentially the same as my OF_BLOBLIST patch, which was rejected:
NAK
The issue is not whether some 'previous stage' set up a bloblist. For example, if VPL_BLOBLIST_PRIOR_STAGE is enabled, that presumably means that TPL set it up. But it doesn't mean that TPL put the FDT in there.
This is wrong. The root problem is saying that the bloblist is in possibly uninitialized memory. The code is quite happy to NOT find the device tree in the bloblist and continue searching other paths.
But until the bloblist is set up, it doesn't exist. We should not be looking for a bloblist that we know is not there yet. The bloblist is set up by bloblist_init(). You seem to be imputing your own semantics for bloblist.
In SPL, init happens in board_init_r(), i.e. after RAM is set up. So don't look in the bloblist until it is set up! It doesn't exist.
In U-Boot proper, we look for it before relocation, so we can relocate and expand it for use with ACPI tables, etc.
Take a look at this patch, too:
3d6531803e1 bloblist: Support initing from multiple places
An alternative here would be to better document the requirements of BLOBLIST_ADDR, and then just disable it on chromebook_coral until someone is inclined to move DDR init in to TPL, or someone finds a non-main-memory address to use for BLOBLIST_ADDR or switches to using BLOBLIST_ALLOC.
Coral's TPL runs in cache-as-ram, with a 30KB limit on code size. It cannot do DDR init in TPL because the DDR blob is large (160KB?) and there is a ton of setup to do first, in any case. When CAR goes away, its memory vanishes, so you need to have copied the bloblist somewhere else (the bloblist holds the MRC data which needs to be written to SPI flash later on, when possible). This all works perfectly and there is really no need to change anything.
Again, you seem to be imputing semantics to bloblist which don't exist.
Regards, Simon