From: Rick Chen rick@andestech.com
In current RISC-V SMP flow, AE350 will encounter the the write failure problem since hart_lottery and available_harts_lock was not in ram address but in flash address when booing from flash.
This patch can help to fix the failure problem when AE350 was booting from flash by disabling this two features.
Changes in v2: - Fix some typos - Also surround the declaration of prior_stage_fdt_address in arch/riscv/cpu/cpu.c with OF_PRIOR_STAGE - Use CONFIP_XIP to replace CONFIG_HART_LOTTERY and CONFIG_AVAILABLE_HARTS
Rick Chen (4): riscv: hart_lottery and available harts features can be selectable riscv: configs: Support AE350 SMP booting from flash flow riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled riscv: configs: AE350 will use CONFIG_OF_PRIOR_STAGE when booting from ram
arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/cpu/cpu.c | 5 ++++- arch/riscv/cpu/start.S | 9 ++++++++- arch/riscv/include/asm/global_data.h | 2 ++ arch/riscv/lib/asm-offsets.c | 2 ++ arch/riscv/lib/smp.c | 2 ++ configs/ae350_rv32_defconfig | 2 +- configs/ae350_rv32_xip_defconfig | 36 +++++++++++++++++++++++++++++++++++ configs/ae350_rv64_defconfig | 2 +- configs/ae350_rv64_xip_defconfig | 37 ++++++++++++++++++++++++++++++++++++ 10 files changed, 103 insertions(+), 4 deletions(-) create mode 100644 configs/ae350_rv32_xip_defconfig create mode 100644 configs/ae350_rv64_xip_defconfig