Signed-off-by: David Jander david@protonic.nl --- include/fsl_pmic.h | 2 +- include/mc13892.h | 41 +++++++++++++++++++++++++++++++++-------- 2 files changed, 34 insertions(+), 9 deletions(-)
diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h index e3abde6..2f2aa7d 100644 --- a/include/fsl_pmic.h +++ b/include/fsl_pmic.h @@ -112,7 +112,7 @@ enum { #define GPO4STBY (1 << 13) #define PWGT1SPIEN (1 << 15) #define PWGT2SPIEN (1 << 16) -#define PWUP (1 << 21) +#define GPO4ADIN (1 << 21)
/* Power Control 0 */ #define COINCHEN (1 << 23) diff --git a/include/mc13892.h b/include/mc13892.h index b291757..4eea6af 100644 --- a/include/mc13892.h +++ b/include/mc13892.h @@ -29,29 +29,51 @@
/* REG_CHARGE */
-#define VCHRG0 0 +#define VCHRG0 (1 << 0) #define VCHRG1 (1 << 1) #define VCHRG2 (1 << 2) #define ICHRG0 (1 << 3) #define ICHRG1 (1 << 4) #define ICHRG2 (1 << 5) #define ICHRG3 (1 << 6) -#define ICHRGTR0 (1 << 7) -#define ICHRGTR1 (1 << 8) -#define ICHRGTR2 (1 << 9) +#define TREN (1 << 7) +#define ACKLPB (1 << 8) +#define THCHKB (1 << 9) #define FETOVRD (1 << 10) #define FETCTRL (1 << 11) #define RVRSMODE (1 << 13) -#define OVCTRL0 (1 << 15) -#define OVCTRL1 (1 << 16) -#define UCHEN (1 << 17) +#define PLIM0 (1 << 15) +#define PLIM1 (1 << 16) +#define PLIMDIS (1 << 17) #define CHRGLEDEN (1 << 18) -#define CHRGRAWPDEN (1 << 19) +#define CHGTMRRST (1 << 19) #define CHGRESTART (1 << 20) #define CHGAUTOB (1 << 21) #define CYCLB (1 << 22) #define CHGAUTOVIB (1 << 23)
+ +/* Power Control 2 (reg 15) */ +#define RESTARTEN (1 << 0) +#define PWRON1RSTEN (1 << 1) +#define PWRON2RSTEN (1 << 2) +#define PWRON3RSTEN (1 << 3) +#define PWRON1DBNC0 (1 << 4) +#define PWRON1DBNC1 (1 << 5) +#define PWRON2DBNC0 (1 << 6) +#define PWRON2DBNC1 (1 << 7) +#define PWRON3DBNC0 (1 << 8) +#define PWRON3DBNC1 (1 << 9) +#define STANDBYINV (1 << 10) +#define STANDBYSECINV (1 << 11) +#define WDIRESET (1 << 12) +#define SPIDRV0 (1 << 13) +#define SPIDRV1 (1 << 14) +#define CLK32KDRV0 (1 << 17) +#define CLK32KDRV1 (1 << 18) +#define STBYDLY0 (1 << 22) +#define STBYDLY1 (1 << 23) + /* REG_SETTING_0/1 */ #define VO_1_20V 0 #define VO_1_30V 1 @@ -84,6 +106,9 @@ #define SWMODE_PFM_PFM 15 #define SWMODE_MASK 0x0F
+/* Switchers 4 (reg 28) */ +#define SWILIMB (1 << 22) + #define SWMODE1_SHIFT 0 #define SWMODE2_SHIFT 10 #define SWMODE3_SHIFT 0