
On 12/02/2011 03:17 AM, Shengzhou Liu wrote:
- fix NAND_CMD_READID command for ONFI detect.
- add NAND_CMD_PARAM command to read the ONFI parameter page.
Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com
drivers/mtd/nand/fsl_elbc_nand.c | 16 +++++++++++++++- 1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 4d1e527..476fdd3 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -350,7 +350,7 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, out_be32(&lbc->fbcr, 5); ctrl->read_bytes = 5; ctrl->use_mdr = 1;
ctrl->mdr = 0;
ctrl->mdr = column;
set_addr(mtd, 0, 0, 0); fsl_elbc_run_command(mtd);
@@ -480,6 +480,20 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, fsl_elbc_run_command(mtd); return;
- case NAND_CMD_PARAM:
dbg("fsl_elbc_cmdfunc: NAND_CMD_PARAM.\n");
out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |
(FIR_OP_UA << FIR_OP1_SHIFT) |
(FIR_OP_RBW << FIR_OP2_SHIFT));
out_be32(&lbc->fcr, NAND_CMD_PARAM << FCR_CMD0_SHIFT);
out_be32(&lbc->fbcr, 256);
ctrl->read_bytes = 256;
ctrl->use_mdr = 1;
ctrl->mdr = column;
set_addr(mtd, 0, 0, 0);
fsl_elbc_run_command(mtd);
return;
This could share code with NAND_CMD_READID -- always read 256 bytes (we'll need to read more than 5 bytes for non-ONFI as well, when we pull in the newer Linux NAND code), and use "command << FCR_CMD0_SHIFT" for FCR.
BTW, has anyone tested the eLBC driver with 16-bit NAND? I think our read_byte() implementation is not going to do the right thing here -- it needs to read a 16-bit word when the chip is 16-bit, and discard the upper half.
-Scott