Hi Michael
-----Ursprüngliche Nachricht----- Von: Michal Simek [mailto:michal.simek@xilinx.com] Gesendet: Dienstag, 6. Dezember 2016 13:59 An: Jaehoon Chung; Herbrechtsmeier, Stefan; u-boot@lists.denx.de Cc: Michal Simek; Simon Glass; Albert Aribaud; Michal Simek; Stephen Warren Betreff: Re: [PATCH v3 3/4] mmc: zynq: Determine base clock frequency via clock framework
On 5.12.2016 23:22, Jaehoon Chung wrote:
On 12/02/2016 10:24 PM, stefan.herbrechtsmeier@weidmueller.de wrote:
From: Stefan Herbrechtsmeier stefan.herbrechtsmeier@weidmueller.de
The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base clock frequency but this clock is not fixed and depends on the hardware configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ doesn't match the real base clock frequency of SDIO_FREQ. Use the clock framework to determine the
frequency at run time.
Signed-off-by: Stefan Herbrechtsmeier stefan.herbrechtsmeier@weidmueller.de
Even if this patch is delegated to Michal, i picked to this. Applied on u-boot-mmc.
Based on my reply in v2 this is not ideal patch http://lists.denx.de/pipermail/u-boot/2016-November/274310.html
Not a problem to take these patches should mmc tree but please wait till you have Ack from me.
Will you ack the patch if I remove the zynq specific code and remove the CONFIG_CLK check with my patch series to move zynq clk driver to DM?
Regards, Stefan
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