
Hi,
On Wednesday 10 August 2016 01:33 AM, Jagan Teki wrote:
Make rx mode flags as generic to spi, earlier mode_rx is maintained separately becuase of some flash specific code.
Nit: s/becuase/because
[...]
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index bb72cb0..37dc64f 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -336,7 +336,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS);
- slave->mode_rx = SPI_RX_QUAD;
- slave->mode |= SPI_RX_QUAD;
#else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, bool enable) { u32 memval;
- u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
- u32 mode = slave->mode | SPI_RX_QUAD | SPI_RX_DUAL;
This will break ti-qspi Quad mode operation. The code below this line (switch statement) expects mode to be either SPI_RX_DUAL or SPI_RX_QUAD but not both.
if (!enable) { writel(0, &priv->base->setup0); @@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, memval |= QSPI_CMD_READ_QUAD; memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; memval |= QSPI_SETUP0_READ_QUAD;
slave->mode_rx = SPI_RX_QUAD;
break; case SPI_RX_DUAL: memval |= QSPI_CMD_READ_DUAL;slave->mode |= SPI_RX_QUAD;
diff --git a/include/spi.h b/include/spi.h index ca96fa4..7d92ddc 100644 --- a/include/spi.h +++ b/include/spi.h @@ -26,12 +26,10 @@ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
-/* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ -#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ -#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */ +#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
Same bit for SPI_RX_FAST and SPI_RX_DUAL? Could you clarify the reason?