Signed-off-by: Tom Rini trini@konsulko.com --- README | 2 +- drivers/net/sh_eth.c | 8 ++++---- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/README b/README index c35207cb2af5..0ae3c6b97c15 100644 --- a/README +++ b/README @@ -550,7 +550,7 @@ The following options need to be configured: CONFIG_SH_ETHER_USE_PORT Define the number of ports to be used
- CONFIG_SH_ETHER_PHY_ADDR + CFG_SH_ETHER_PHY_ADDR Define the ETH PHY's address
CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 72fdf7ad89a1..70ec27999062 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -35,8 +35,8 @@ #ifndef CONFIG_SH_ETHER_USE_PORT # error "Please define CONFIG_SH_ETHER_USE_PORT" #endif -#ifndef CONFIG_SH_ETHER_PHY_ADDR -# error "Please define CONFIG_SH_ETHER_PHY_ADDR" +#ifndef CFG_SH_ETHER_PHY_ADDR +# error "Please define CFG_SH_ETHER_PHY_ADDR" #endif
#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \ @@ -636,7 +636,7 @@ int sh_eth_initialize(struct bd_info *bd) memset(eth, 0, sizeof(struct sh_eth_dev));
eth->port = CONFIG_SH_ETHER_USE_PORT; - eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR; + eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port);
@@ -853,7 +853,7 @@ static int sh_ether_probe(struct udevice *udev) priv->bus = miiphy_get_dev_by_name(udev->name);
eth->port = CONFIG_SH_ETHER_USE_PORT; - eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR; + eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port);
diff --git a/include/configs/alt.h b/include/configs/alt.h index 93aee6b6a460..8dd4b101c668 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -25,7 +25,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/condor.h b/include/configs/condor.h index 3f99cbf9dab9..43b88f127213 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -15,7 +15,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/gose.h b/include/configs/gose.h index 45a537341b0e..5184db41061f 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -21,7 +21,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 3fde61407094..8ba9b73672c8 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -18,7 +18,7 @@
/* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0 +#define CFG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index b3b6f03e08d4..2910336def6c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -21,7 +21,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/lager.h b/include/configs/lager.h index 16d15ccdd913..815239a73bd4 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -22,7 +22,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/porter.h b/include/configs/porter.h index 7a1d9d48a150..8ba6a7d3bc8e 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -26,7 +26,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/silk.h b/include/configs/silk.h index 4edb1bc3c533..df5f0a246241 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -26,7 +26,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/stout.h b/include/configs/stout.h index 0004fb454c1e..a0a1c50cacdf 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -30,7 +30,7 @@
/* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index bf1359f8df54..1513dc9458e6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -191,7 +191,7 @@ CFG_SET_DFU_ALT_BUF_LEN CFG_SH_ETHER_ALIGNE_SIZE CFG_SH_ETHER_CACHE_INVALIDATE CFG_SH_ETHER_CACHE_WRITEBACK -CONFIG_SH_ETHER_PHY_ADDR +CFG_SH_ETHER_PHY_ADDR CONFIG_SH_ETHER_PHY_MODE CONFIG_SH_ETHER_USE_PORT CONFIG_SH_QSPI_BASE