XPSS prefix was used in past and it is obsolete for quite some time. Let's use correct SoC name which is Zynq.
Signed-off-by: Michal Simek michal.simek@xilinx.com --- Changes in v2: - New patch in this series to reflect Tom's comments - Remove XPSS_ prefix and replace it with ZYNQ
arch/arm/include/asm/arch-zynq/hardware.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h index d0c69da..a99edbe 100644 --- a/arch/arm/include/asm/arch-zynq/hardware.h +++ b/arch/arm/include/asm/arch-zynq/hardware.h @@ -23,9 +23,9 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H
-#define XPSS_SYS_CTRL_BASEADDR 0xF8000000 -#define XPSS_DEV_CFG_APB_BASEADDR 0xF8007000 -#define XPSS_SCU_BASEADDR 0xF8F00000 +#define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 +#define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 +#define ZYNQ_SCU_BASEADDR 0xF8F00000
/* Reflect slcr offsets */ struct slcr_regs { @@ -49,7 +49,7 @@ struct slcr_regs { u32 ocm_cfg; /* 0x910 */ };
-#define slcr_base ((struct slcr_regs *) XPSS_SYS_CTRL_BASEADDR) +#define slcr_base ((struct slcr_regs *)ZYNQ_SYS_CTRL_BASEADDR)
struct devcfg_regs { u32 ctrl; /* 0x0 */ @@ -72,7 +72,7 @@ struct devcfg_regs { u32 read_count; /* 0x8c */ };
-#define devcfg_base ((struct devcfg_regs *) XPSS_DEV_CFG_APB_BASEADDR) +#define devcfg_base ((struct devcfg_regs *)ZYNQ_DEV_CFG_APB_BASEADDR)
struct scu_regs { u32 reserved1[16]; @@ -80,6 +80,6 @@ struct scu_regs { u32 filter_end; /* 0x44 */ };
-#define scu_base ((struct scu_regs *) XPSS_SCU_BASEADDR) +#define scu_base ((struct scu_regs *)ZYNQ_SCU_BASEADDR)
#endif /* _ASM_ARCH_HARDWARE_H */ -- 1.8.2.1