On Fri, Jul 26, 2013 at 11:33 AM, Michal Simek michal.simek@xilinx.com wrote:
If you don't wait you will loose the first sent packet even all bits in emacps are correctly setup.
Signed-off-by: Michal Simek michal.simek@xilinx.com
Changes in v2: None
arch/arm/cpu/armv7/zynq/slcr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index 52048c6..1c28e96 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -86,7 +86,7 @@ void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk) /* Configure GEM_RCLK_CTRL */ writel(rclk, &slcr_base->gem0_rclk_ctrl); }
udelay(100000);out: zynq_slcr_lock(); } -- 1.8.2.3
Acked-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com
-- Thanks, Jagan.