Re: [U-Boot] [PATCH v2 11/20] sunxi: spl: deassert the NAND controller reset line

On Thu, Feb 22, 2018 at 02:33:41PM +0100, Miquel Raynal wrote:

Ensure the NAND controller reset line is deasserted before use.

Signed-off-by: Miquel Raynal miquel.raynal@bootlin.com

board/sunxi/board.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 8891961dcc..54ac018b80 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -286,6 +286,7 @@ static void nand_clock_setup(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;

setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));

• setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0));

This is only relevant for the SoCs after the A31 (sun6i, sun8i, and probably the A80 (sun9i) and the armv8 (sun50i) families), so you should put an ifdef there.

Maxime