Hi Anton, Thank you, I have done a lot trial and error but still in vain. I'm using u-boot-2009.06-rc3. This is my /board/freescale/mpc8544board/nand.c below, as to nand_base.c and fsl_upm.c I didn't change change anything.
=========================== nand.c ==================================== /* * Initialize UPM for NAND flash access. */ static void nand_upm_setup (volatile ccsr_lbc_t *lbc) { int i=0;
static uint UPMATable[] = { 0x0fffff00, 0x0ffcfc00, 0x0ffcfc00, 0xfffffc04, 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc01, 0x0ffffc00, 0x0ffcfc80, 0x0ffdfc00, 0x0ffffc04, 0x0ffcfc00, 0x0ffdfc00, 0x0ffffc04, 0x0ffcfc00, 0x0ffdfc00, 0x0ffffc04, 0x0ffcfc00, 0x0ffdfc00, 0x0ffffc84, 0xfffffc00, 0xfffffc01, 0xfffffc01, 0xfffffc20, 0x0fe33c00, 0x0fa33c00, 0x0ff77c05, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, 0x0feffc80, 0x0faffc00, 0x0ffffc04, 0x0feffc00, 0x0faffc00, 0x0ffffc04, 0x0feffc00, 0x0faffc00, 0x0ffffc04, 0x0feffc00, 0x0faffc00, 0x0ffffc84, 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01 };
lbc->mamr = 0x10000000; //op=10
for(i=0;i<64;i++) { lbc->mdr = UPMATable[i];
printf("lbc->mdr is 0x%08x \n", lbc->mdr);
*(char *)(0xff000000) = 0x0; //dummy write } lbc->mamr = 0x00000000; //normal
while (lbc->mamr !=0x00000000); //wait MAMR finish writting printf("ram array is done\n");
return; }
static struct fsl_upm_nand fun = { .width = 8, .upm_cmd_offset = 0x08, .upm_addr_offset = 0x10, .upm_mar_chip_offset = CONFIG_SYS_NAND_CS_DIST, .chip_offset = CONFIG_SYS_NAND_CS_DIST, .chip_delay = NAND_BIG_DELAY_US, //per spec, 25 us .wait_flags = FSL_UPM_WAIT_RUN_PATTERN | FSL_UPM_WAIT_WRITE_BUFFER, };
int board_nand_init (struct nand_chip *nand) { volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); debug("board_nand_init begin \n");
nand_upm_setup (lbc); nand->options = NAND_SAMSUNG_LP_OPTIONS ;
fun.upm.io_addr = nand->IO_ADDR_R; fun.upm.mxmr = (void __iomem *)&lbc->mamr; fun.upm.mdr = (void __iomem *)&lbc->mdr; fun.upm.mar = (void __iomem *)&lbc->mar;
debug("fun.upm.io_addr is 0x%08x \n", fun.upm.io_addr ); debug("fun.upm.mxmr is 0x%08x \n", fun.upm.mxmr ); debug("fun.upm.mdr is 0x%08x \n", fun.upm.mdr ); debug("fun.upm.mar is 0x%08x \n", fun.upm.mar );
return fsl_upm_nand_init (nand, &fun); }
=======================================================================
Any hint ? Please help ! Thanks.
Anton Vorontsov-2 wrote:
On Wed, Sep 16, 2009 at 11:55:12PM +0800, Bin Meng wrote:
On Wed, Sep 16, 2009 at 5:40 AM, duckycool duckycool@gmail.com wrote:
Correction, the nand flash is K9F8G08U0M.
K9F8G08U0M is a 4KB page size NAND flash. Freescale eLBC NAND flash controller does not support 4KB page size.
MPC8544 doesn't have eLBC, so its LBC can't speak NAND directly, only via UPM (user-programmable machine). And with UPM we can support any NAND flashes.
As for the original problem, it could be anything: schematics (I assume it's custom 8544 board), timings setup (OR/BR), or UPM array problem.
Unfortunately it's hard to debug these sort of things without logic analyzer, so if you don't have one, I'd suggest to play 'trial & error' game.
Cc'ing Wolfgang Grandegger though, maybe he has better ideas.
-- Anton Vorontsov email: cbouatmailru@gmail.com irc://irc.freenode.net/bd2 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot