On 28 Jul 2017, at 05:38, Simon Glass sjg@chromium.org wrote:
On 26 July 2017 at 04:40, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The RK3368 has both a limited SPL size (just 0x7000 bytes) and the added challenge of booting in AArch64, which increases the code size for SPL (particularily when using the LP64 programming model). For this reason we expect the RK3368 to always use OF_PLATDATA for its SPL stage.
But I thought that you had SDRAM ready by the time you boot to SPL? So why the limit?
Another commit message from before I moved to having a TPL. Having another set of eyes look at these is priceless.
This change adds support for the MSCH, PMUGRF and GRF register regions in syscon, which are necessary for initialising the RK3368's DRAM controller.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v2: None
arch/arm/mach-rockchip/rk3368/syscon_rk3368.c | 35 +++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)