Wolfgang Denk a écrit :
Dear Albert Aribaud,
In message 1258239796-21528-4-git-send-email-albert.aribaud@free.fr you wrote:
This board is based on the Marvell Orion5x SoC. Current support is limited to console and Flash. Flash support uses LEGACY as the Macronix 29LV400 used on ED Mini V2 is not 100% CFI compliant.
And the differences are really so big that we cannot tweak the CFI driver?
Apparently not.
The MX29LV400CB is 8-bit/16-bit and it configured on the ED Mini as 8-bit, but presents a pure 16-bit QRY (with zeroes between qry bytes) which causes cfi_flash to mistakenly detect it as 16-bit wide, and thus use 16-bit accesses at 16-bit addresses to read IDs and write instructions, which of course does not work.
+int dram_init(void) +{
- int i;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);gd->bd->bi_dram[i].size = orion5x_sdram_bs(i);- }
- return 0;
+}
Cannot you use get_ram_size() for auto-sizing and checking?
As this is SoC code, not board code, and as the SoC allows to have up to four non-contiguous DRAM banks, I prefer to read the four DRAM base/size registers.
Amicalement,