From: Patrice Chotard patrice.chotard@st.com
This series : _ Fixes one issue stm32_clk_get_rate() _ Update the SDMMC clock generation across all STM32F SoCs _ Adds LTDC clock generation from PLLSAI _ Adds set_rate() for LTDC clock _ Adds DSI clock support
Patrice Chotard (7): clk: clk_stm32f: Fix stm32_clk_get_rate() clk: clk_stm32f: Fix RCC_PLLSAICFGR mask defines clk: clk_stm32f: No more need of 48Mhz from PLL_SAI clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() part clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock clk: clk_stm32f: Add set_rate for LTDC clock clk: clk_stm32f: Add DSI clock support
drivers/clk/clk_stm32f.c | 279 +++++++++++++++++++++++++++------- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 2 files changed, 224 insertions(+), 56 deletions(-)