
On 17:09 Fri 14 Nov , Ron Madrid wrote:
This patch will create a new board, SIMPC8313, from Sheldon Instruments. This board boots from NAND devices and is configureable for either large or small page devices. The board supports non-soldered DDR2, one ethernet port, a Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected to the eLBC providing glue logic to a TMS320C67xx DSP.
Please split (80 chars max)
Signed-off-by: Ron Madrid ron_madrid@sbcglobal.net
MAINTAINERS | 4 + MAKEALL | 3 +- Makefile | 15 + board/sheldon/simpc8313/Makefile | 50 +++ board/sheldon/simpc8313/config.mk | 13 + board/sheldon/simpc8313/sdram.c | 193 ++++++++++ board/sheldon/simpc8313/simpc8313.c | 134 +++++++ doc/README.simpc8313 | 80 ++++ include/configs/SIMPC8313.h | 544 +++++++++++++++++++++++++++ nand_spl/board/sheldon/simpc8313/Makefile | 101 +++++ nand_spl/board/sheldon/simpc8313/u-boot.lds | 52 +++ 11 files changed, 1188 insertions(+), 1 deletions(-) create mode 100644 board/sheldon/simpc8313/Makefile create mode 100644 board/sheldon/simpc8313/config.mk create mode 100644 board/sheldon/simpc8313/sdram.c create mode 100644 board/sheldon/simpc8313/simpc8313.c create mode 100644 doc/README.simpc8313 create mode 100644 include/configs/SIMPC8313.h create mode 100644 nand_spl/board/sheldon/simpc8313/Makefile create mode 100644 nand_spl/board/sheldon/simpc8313/u-boot.lds
diff --git a/MAINTAINERS b/MAINTAINERS index 127604b..2211747 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -263,6 +263,10 @@ Jon Loeliger jdl@freescale.com
MPC8641HPCN MPC8641D
+Ron Madrid info@sheldoninst.com
- SIMPC8313 MPC8313
Dan Malek dan@embeddedalley.com
stxgp3 MPC85xx diff --git a/MAKEALL b/MAKEALL index dbed268..82b8231 100755 --- a/MAKEALL +++ b/MAKEALL @@ -1,4 +1,4 @@ -#!/bin/sh +8#!/bin/sh
?????
: ${JOBS:=}
@@ -343,6 +343,7 @@ LIST_83xx=" \ MPC837XERDB \ MVBLM7 \ sbc8349 \
- SIMPC8313_LP \ TQM834x \
"
diff --git a/board/sheldon/simpc8313/sdram.c b/board/sheldon/simpc8313/sdram.c new file mode 100644 index 0000000..f7fa234 --- /dev/null +++ b/board/sheldon/simpc8313/sdram.c @@ -0,0 +1,193 @@ +/*
- Copyright (C) Freescale Semiconductor, Inc. 2006-2007
- Copyright (C) Sheldon Instruments, Inc. 2008
- Author: Ron Madrid info@sheldoninst.com
- (C) Copyright 2006
- Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <mpc83xx.h> +#include <spd_sdram.h> +#include <asm/bitops.h> +#include <asm/io.h> +#include <asm/processor.h> +#include <asm/mmu.h>
+DECLARE_GLOBAL_DATA_PTR;
+static long fixed_sdram(void);
+#if defined(CONFIG_NAND_SPL) +void si_wait_i2c(void) +{
- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- while (!(__raw_readb(&im->i2c[0].sr) & 0x02))
;
- __raw_writeb(0x00, &im->i2c[0].sr);
- sync();
- return;
+}
+void si_read_i2c(u32 lbyte, int count, u8 *buffer) +{
- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- u32 i;
- u8 chip = 0x50 << 1; /* boot sequencer I2C */
- u32 ubyte = (lbyte & 0xff00) >> 8;
- lbyte &= 0xff;
- /*
* Set up controller
*/
- __raw_writeb(0x3f, &im->i2c[0].fdr);
- __raw_writeb(0x00, &im->i2c[0].adr);
- __raw_writeb(0x00, &im->i2c[0].sr);
- __raw_writeb(0x00, &im->i2c[0].dr);
- while (__raw_readb(&im->i2c[0].sr) & 0x20)
;
- /*
* Writing address to device
*/
- __raw_writeb(0xb0, &im->i2c[0].cr);
- sync();
- __raw_writeb(chip, &im->i2c[0].dr);
- si_wait_i2c();
- __raw_writeb(0xb0, &im->i2c[0].cr);
- sync();
- __raw_writeb(ubyte, &im->i2c[0].dr);
- si_wait_i2c();
- __raw_writeb(lbyte, &im->i2c[0].dr);
- si_wait_i2c();
- __raw_writeb(0xb4, &im->i2c[0].cr);
- sync();
- __raw_writeb(chip + 1, &im->i2c[0].dr);
- si_wait_i2c();
- __raw_writeb(0xa0, &im->i2c[0].cr);
- sync();
- /*
* Dummy read
*/
- __raw_readb(&im->i2c[0].dr);
- si_wait_i2c();
- /*
* Read actual data
*/
- for (i = 0; i < count; i++)
- {
if (i == (count - 2)) /* Reached next to last byte, No ACK */
__raw_writeb(0xa8, &im->i2c[0].cr);
if (i == (count - 1)) /* Reached last byte, STOP */
__raw_writeb(0x88, &im->i2c[0].cr);
/* Read byte of data */
buffer[i] = __raw_readb(&im->i2c[0].dr);
if (i == (count - 1))
break;
si_wait_i2c();
- }
- return;
+} +#endif /* CONFIG_NAND_SPL */
+phys_size_t initdram(int board_type) +{
- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile fsl_lbus_t *lbc= &im->lbus;
- u32 msize;
- if ((__raw_readl(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32) im)
return -1;
- /* DDR SDRAM - Main SODIMM */
- __raw_writel(CONFIG_SYS_DDR_BASE & LAWBAR_BAR, &im->sysconf.ddrlaw[0].bar);
- msize = fixed_sdram();
- /* Local Bus setup lbcr and mrtpr */
- __raw_writel(CONFIG_SYS_LBC_LBCR, &lbc->lbcr);
- __raw_writel(CONFIG_SYS_LBC_MRTPR, &lbc->mrtpr);
- sync();
- /* return total bus SDRAM size(bytes) -- DDR */
- return (msize * 1024 * 1024);
+}
+/*************************************************************************
- fixed sdram init -- reads values from boot sequencer I2C
- ************************************************************************/
+static long fixed_sdram(void) +{
- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- u32 msizelog2, msize = 1;
+#if defined(CONFIG_NAND_SPL)
- u32 i;
- const u8 bytecount = 135;
- u8 buffer[bytecount];
- u32 addr, data;
- si_read_i2c(0, bytecount, buffer);
- for (i = 18; i < bytecount; i += 7){
addr = (u32)buffer[i];
addr <<= 8;
addr |= (u32)buffer[i + 1];
addr <<= 2;
data = (u32)buffer[i + 2];
data <<= 8;
data |= (u32)buffer[i + 3];
data <<= 8;
data |= (u32)buffer[i + 4];
data <<= 8;
data |= (u32)buffer[i + 5];
__raw_writel(data, (u32 *)(CONFIG_SYS_IMMR + addr));
- }
- sync();
- /* enable DDR controller */
- __raw_writel((__raw_readl(&im->ddr.sdram_cfg) | SDRAM_CFG_MEM_EN), &im->ddr.sdram_cfg);
+#endif /* (CONFIG_NAND_SPL) */
why not create a nand_spl_fixed_sdram()?
- msizelog2 = ((__raw_readl(&im->sysconf.ddrlaw[0].ar) & LAWAR_SIZE) + 1);
- msize <<= (msizelog2 - 20);
- return msize;
+} diff --git a/board/sheldon/simpc8313/simpc8313.c b/board/sheldon/simpc8313/simpc8313.c new file mode 100644 index 0000000..25e5c24 --- /dev/null +++ b/board/sheldon/simpc8313/simpc8313.c @@ -0,0 +1,134 @@ +/*
- Copyright (C) Freescale Semiconductor, Inc. 2006-2007
- Copyright (C) Sheldon Instruments, Inc. 2008
- Author: Ron Madrid info@sheldoninst.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <libfdt.h> +#include <pci.h> +#include <mpc83xx.h> +#include <ns16550.h> +#include <nand.h>
why not split this file in two and do the conditinal compile via Makefile?
+DECLARE_GLOBAL_DATA_PTR;
+int checkboard(void) +{
- puts("Board: Sheldon Instruments SIMPC8313\n");
- return 0;
+}
+#ifndef CONFIG_NAND_SPL +static struct pci_region pci_regions[] = {
- {
bus_start: CONFIG_SYS_PCI1_MEM_BASE,
phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
size: CONFIG_SYS_PCI1_MEM_SIZE,
flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
- },
- {
bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
size: CONFIG_SYS_PCI1_MMIO_SIZE,
flags: PCI_REGION_MEM
- },
- {
bus_start: CONFIG_SYS_PCI1_IO_BASE,
phys_start: CONFIG_SYS_PCI1_IO_PHYS,
size: CONFIG_SYS_PCI1_IO_SIZE,
flags: PCI_REGION_IO
- }
+};
+void pci_init_board(void) +{
- volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
- volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
- volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
- struct pci_region *reg[] = { pci_regions };
- int warmboot;
- /* Enable all 3 PCI_CLK_OUTPUTs. */
- clk->occr |= 0xe0000000;
- /*
* Configure PCI Local Access Windows
*/
- pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
- pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
- warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
- mpc83xx_pci_init(1, reg, warmboot);
+}
+/*
- Miscellaneous late-boot configurations
- */
+int misc_init_r(void) +{
- int rc = 0;
- return rc;
+}
+#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{
- ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
+#endif +} +#endif +#else /* CONFIG_NAND_SPL */ +void board_init_f(ulong bootflag) +{
- NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
- puts("NAND boot... ");
- init_timebase();
- initdram(0);
- relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000, (gd_t *)gd,
CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+void board_init_r(gd_t *gd, ulong dest_addr) +{
- nand_boot();
+}
+void putc(char c) +{
- if (gd->flags & GD_FLG_SILENT)
return;
- if (c == '\n')
NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r');
- NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c);
+} +#endif diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile new file mode 100644 index 0000000..3044b5d --- /dev/null +++ b/nand_spl/board/sheldon/simpc8313/Makefile @@ -0,0 +1,101 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# (C) Copyright 2008 Freescale Semiconductor +# (C) Copyright Sheldon Instruments, Inc. 2008 +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+NAND_SPL := y +TEXT_BASE := 0xfff00000
+include $(TOPDIR)/config.mk
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL
+SOBJS = start.o ticks.o +COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o time.o
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+nandobj := $(OBJTREE)/nand_spl/
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
please use $@ and $< to simplify it
Best Regards, J.