On 18/12/2018 12:06, Jagan Teki wrote:
On Tue, Dec 18, 2018 at 4:09 PM karlp@tweak.net.au wrote:
From: Karl Palsson karlp@tweak.net.au
This reverts commit a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1
This causes DRAM init failures on (at least)
- allwinner h3 nanopi-duo2
- allwinner h2+ orangepi zero v1.1
Signed-off-by: Karl Palsson karlp@tweak.net.au
Ideally, this should get into 2019.01, so that this release is not broken on those targets.
Better to understand the issue here, since I have BPI-M2+ which boots fine w/o this revert.
Could this be a .bss issue? This lies in DRAM and is thus only available *after* DRAM init. IIRC we silently rely on not accessing anything in .bss before the DRAM is up, see 59d07ee08e85 for instance. I don't immediately spot any .bss usage in clock_set_pll1(), though.
Or is the 1GHz CPU clock speed too fast for the DRAM init? If I am not mistaken, we run with 24MHz before, so there might be some "natural" delay in some setup routines. Some DRAM chips or board layout might be more susceptible to this than others, which might explain why it only fails on some boards.
So if the original patch is about bailing out on error early, can't we just do *that* before the DRAM init, keeping the CPU clock setup still after DRAM?
Cheers, Andre.