Split PHY-related initialization to a common file
The mv881116 PHY initialization is split out to a common file to enable code reuse between different boards.
Signed-off-by: Simon Kagstrom simon.kagstrom@netinsight.net --- board/Marvell/common/mv881116.c | 65 +++++++++++++++++++++++++++++++++ board/Marvell/common/mv881116.h | 29 +++++++++++++++ board/Marvell/sheevaplug/Makefile | 2 +- board/Marvell/sheevaplug/sheevaplug.c | 32 ++--------------- board/Marvell/sheevaplug/sheevaplug.h | 8 ---- 5 files changed, 98 insertions(+), 38 deletions(-) create mode 100644 board/Marvell/common/mv881116.c create mode 100644 board/Marvell/common/mv881116.h
diff --git a/board/Marvell/common/mv881116.c b/board/Marvell/common/mv881116.c new file mode 100644 index 0000000..9f5c7f1 --- /dev/null +++ b/board/Marvell/common/mv881116.c @@ -0,0 +1,65 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Simon Kagstrom simon.kagstrom@netinsight.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +#include <common.h> +#include <miiphy.h> +#include "mv881116.h" + +/* PHY related */ +#define MV88E1116_LED_FCTRL_REG 10 +#define MV88E1116_CPRSP_CR3_REG 21 +#define MV88E1116_MAC_CTRL_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +void mv881116_reset_phy(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __FUNCTION__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1116 Initialized on %s\n", name); +} diff --git a/board/Marvell/common/mv881116.h b/board/Marvell/common/mv881116.h new file mode 100644 index 0000000..f1fe13f --- /dev/null +++ b/board/Marvell/common/mv881116.h @@ -0,0 +1,29 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Simon Kagstrom simon.kagstrom@netinsight.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +#ifndef __MV881116_H +#define __MV881116_H + +void mv881116_reset_phy(char *name); + +#endif /* __MV881116_H */ diff --git a/board/Marvell/sheevaplug/Makefile b/board/Marvell/sheevaplug/Makefile index e378b5b..05c979d 100644 --- a/board/Marvell/sheevaplug/Makefile +++ b/board/Marvell/sheevaplug/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS := sheevaplug.o +COBJS := sheevaplug.o ../common/mv881116.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 547126a..f018a46 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -27,6 +27,7 @@ #include <asm/arch/kirkwood.h> #include <asm/arch/mpp.h> #include "sheevaplug.h" +#include "../common/mv881116.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -120,36 +121,9 @@ int dram_init(void) }
#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ void reset_phy(void) { - u16 reg; - u16 devadr; - char *name = "egiga0"; - - if (miiphy_set_current_dev(name)) - return; - - /* command to read PHY dev address */ - if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { - printf("Err..%s could not read PHY dev address\n", - __FUNCTION__); - return; - } - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, devadr); - - printf("88E1116 Initialized on %s\n", name); + /* Configure and enable MV88E1116 PHY */ + mv881116_reset_phy("egiga0"); } #endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h index 3ed5b7f..030d64f 100644 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ b/board/Marvell/sheevaplug/sheevaplug.h @@ -30,12 +30,4 @@ #define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ #define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
-/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - #endif /* __SHEEVAPLUG_H */