Since we now have the driver for Qualcomm PRNG HW, lets use it and add the necessary clocks and nodes.
Signed-off-by: Robert Marko robert.marko@sartura.hr Cc: Luka Perkov luka.perkov@sartura.hr --- arch/arm/dts/qcom-ipq4019.dtsi | 7 +++++++ arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 ++++ 2 files changed, 11 insertions(+)
diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi index 031691e5d2..7a52ea2c4e 100644 --- a/arch/arm/dts/qcom-ipq4019.dtsi +++ b/arch/arm/dts/qcom-ipq4019.dtsi @@ -60,6 +60,13 @@ u-boot,dm-pre-reloc; };
+ rng: rng@22000 { + compatible = "qcom,prng"; + reg = <0x22000 0x140>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + status = "disabled"; + }; + reset: gcc-reset@1800000 { compatible = "qcom,gcc-reset-ipq4019"; reg = <0x1800000 0x60000>; diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c b/arch/arm/mach-ipq40xx/clock-ipq4019.c index d5b5f4cb79..31ae9719e8 100644 --- a/arch/arm/mach-ipq40xx/clock-ipq4019.c +++ b/arch/arm/mach-ipq40xx/clock-ipq4019.c @@ -54,6 +54,10 @@ static int msm_enable(struct clk *clk) /* This clock is already initialized by SBL1 */ return 0; break; + case GCC_PRNG_AHB_CLK: /*PRNG*/ + /* This clock is already initialized by SBL1 */ + return 0; + break; default: return 0; }