Re: [U-Boot] [V2 12/15] S3c64xx: clear GPIO, Interrupt, Watchdog variable.

Dear Zhong Hongbo

On 14 July 2012 01:11, Zhong Hongbo bocui107@gmail.com wrote:

From: Zhong Hongbo bocui107@gmail.com

Signed-off-by: Zhong Hongbo bocui107@gmail.com

Change for V2: - None.

---

arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 260 --------------------------- board/samsung/smdk6400/lowlevel_init.S | 23 ++-- 2 files changed, 11 insertions(+), 272 deletions(-)

diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 79d5ab3..02828e8 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -46,13 +46,13 @@ lowlevel_init: /* LED on only #8 */ ldr r0, =ELFIN_GPIO_BASE ldr r1, =0x55540000

•   str     r1, [r0, #GPNCON_OFFSET]
  

•   str     r1, [r0, #0x830]        @ GPNCON_OFFSET
  
    ldr     r1, =0x55555555
  

•   str     r1, [r0, #GPNPUD_OFFSET]
  

•   str     r1, [r0, #0x838]        @ GPNPUD_OFFSET
  
    ldr     r1, =0xf000
  

•   str     r1, [r0, #GPNDAT_OFFSET]
  

•   str     r1, [r0, #0x834]        @ GPNDAT_OFFSET
  
    /* Disable Watchdog */
    ldr     r0, =0x7e000000         @0x7e004000
  

@@ -61,7 +61,7 @@ lowlevel_init: str r1, [r0]

    /* External interrupt pending clear */

•   ldr     r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET)  /*EINTPEND*/
  

•   ldr     r0, =(ELFIN_GPIO_BASE + 0x924)  /*EINTPEND*/
    ldr     r1, [r0]
    str     r1, [r0]
  
  

@@ -70,18 +70,18 @@ lowlevel_init:

    /* Disable all interrupts (VIC0 and VIC1) */
    mvn     r3, #0x0

•   str     r3, [r0, #oINTMSK]
  

•   str     r3, [r1, #oINTMSK]
  

•   str     r3, [r0, #0x14]         @ INTMSK
  

•   str     r3, [r1, #0x14]
  
    /* Set all interrupts as IRQ */
    mov     r3, #0x0
  

•   str     r3, [r0, #oINTMOD]
  

•   str     r3, [r1, #oINTMOD]
  

•   str     r3, [r0, #0x0c]         @ INTMOD
  

•   str     r3, [r1, #0x0c]
  
    /* Pending Interrupt Clear */
    mov     r3, #0x0
  

•   str     r3, [r0, #oVECTADDR]
  

•   str     r3, [r1, #oVECTADDR]
  

•   str     r3, [r0, #0xf00]        @ VECTADDR
  

•   str     r3, [r1, #0xf00]
  
  

#ifdef CONFIG_SPL_BUILD /* init system clock */ @@ -136,7 +136,6 @@ wakeup_reset: mov pc, r1 nop nop

/*

• system_clock_init: Initialize core clock and bus clock.
• void system_clock_init(void)

@@ -241,7 +240,7 @@ uart_asm_init: /* set GPIO to enable UART */ ldr r0, =ELFIN_GPIO_BASE ldr r1, =0x220022

•   str     r1, [r0, #GPACON_OFFSET]
  

•   str     r1, [r0, #0x0]          @ GPACON_OFFSET
    mov     pc, lr
  

#endif

Too many magic numbers. Please fix it globally.

Thanks. Minkyu Kang.