9 May
2019
9 May
'19
10:51 p.m.
On Wed, May 1, 2019 at 5:36 PM Marek Vasut marek.vasut@gmail.com wrote:
According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3 (r8a77995).
Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM when the DT explicitly specifies RGMII ID or TXID mode instead of setting it unconditionally when the PHY link speed is 1000 Mbit/s.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Joe Hershberger joe.hershberger@ni.com
Acked-by: Joe Hershberger joe.hershberger@ni.com