On 30/10/24 13:58, Manorit Chawdhry wrote:
Hi Neha, Aniket,
On 13:31-20241030, Manorit Chawdhry wrote:
Hi Aniket,
On 15:40-20241029, Manorit Chawdhry wrote:
Hi Aniket,
On 18:27-20241023, Aniket Limaye wrote:
From: Reid Tonking reidt@ti.com
The default j7200 devicetree and k3_avs driver set 2GHz/1GHz frequency for A72/MSMC clks and the OPP_NOM voltage.
J7200 SOCs may support OPP_LOW Operating Performance Point: 1GHz/500MHz clks for A72/MSMC and OPP_LOW AVS voltage read from efuse.
Hence, add a config check to select OPP_LOW specs:
- Check if OPP_LOW AVS voltage read from efuse is valid.
- Update the clock frequencies in devicetree.
- Program the OPP_LOW AVS voltage for VDD_CPU.
Signed-off-by: Reid Tonking reidt@ti.com Signed-off-by: Aniket Limaye a-limaye@ti.com
[...]
+int fix_freq(const void *fdt)
I think this can be static as well btw, maybe rename it to something more descriptive as well. fdt_fixup_a72_clock_frequency?
Do you think ft_system_setup is a good place for doing this fixup btw? Was wondering that it would be good to know what all DT fixups are being done at some common place instead of multiple scattered places but not sure when does ft_system_setup kick in, would it be before we startup a72?
So it looks like ft_system_setup is being called only before booting into linux Kernel.
As discussed offline, another place to handle fdt_fixups cleanly could be spl_perform_fixups() in board/ti/j721e/evm.c
I would agree that this dt fixup would be better placed there instead of in board_init_f() directly. Will try doing that.
Thanks, Aniket
Regards, Manorit