On Wed, 10 Feb 2021, 2:07 AM Tom Rini, trini@konsulko.com wrote:
This board has not been converted to CONFIG_DM_MMC by the deadline of v2019.04, which is almost two years ago. In addition there are other DM migrations it is also missing. Remove it.
We did get the odd bug report from debian for sheevaplug. They were reasonably popular with enthusiasts at one point. Personally I wouldn't miss this board but it might be worth a heads up (hence adding Vagrant C. to the Cc).
Cc: Prafulla Wadaskar prafulla@marvell.com Signed-off-by: Tom Rini trini@konsulko.com
arch/arm/dts/Makefile | 3 +- arch/arm/dts/kirkwood-sheevaplug-common.dtsi | 104 -------------- arch/arm/dts/kirkwood-sheevaplug.dts | 42 ------ arch/arm/mach-kirkwood/Kconfig | 4 - board/Marvell/sheevaplug/Kconfig | 12 -- board/Marvell/sheevaplug/MAINTAINERS | 6 - board/Marvell/sheevaplug/Makefile | 7 - board/Marvell/sheevaplug/kwbimage.cfg | 144 ------------------- board/Marvell/sheevaplug/sheevaplug.c | 135 ----------------- board/Marvell/sheevaplug/sheevaplug.h | 24 ---- configs/sheevaplug_defconfig | 55 ------- include/configs/sheevaplug.h | 73 ---------- 12 files changed, 1 insertion(+), 608 deletions(-) delete mode 100644 arch/arm/dts/kirkwood-sheevaplug-common.dtsi delete mode 100644 arch/arm/dts/kirkwood-sheevaplug.dts delete mode 100644 board/Marvell/sheevaplug/Kconfig delete mode 100644 board/Marvell/sheevaplug/MAINTAINERS delete mode 100644 board/Marvell/sheevaplug/Makefile delete mode 100644 board/Marvell/sheevaplug/kwbimage.cfg delete mode 100644 board/Marvell/sheevaplug/sheevaplug.c delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h delete mode 100644 configs/sheevaplug_defconfig delete mode 100644 include/configs/sheevaplug.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b8f88bca0af9..12a74ed0eb08 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -58,8 +58,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \ kirkwood-ns2lite.dtb \ kirkwood-ns2max.dtb \ kirkwood-ns2mini.dtb \
kirkwood-pogo_e02.dtb \kirkwood-sheevaplug.dtb
kirkwood-pogo_e02.dtbdtb-$(CONFIG_MACH_S900) += \ bubblegum_96.dtb diff --git a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/dts/kirkwood-sheevaplug-common.dtsi deleted file mode 100644 index 0a698d3b7393..000000000000 --- a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi +++ /dev/null @@ -1,104 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/*
- kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
- Copyright (C) 2013 Simon Baatz gmbnomis@gmail.com
- */
-#include "kirkwood.dtsi" -#include "kirkwood-6281.dtsi"
-/ {
memory {device_type = "memory";reg = <0x00000000 0x20000000>;};chosen {bootargs = "console=ttyS0,115200n8 earlyprintk";stdout-path = &uart0;};ocp@f1000000 {pinctrl: pin-controller@10000 {pmx_usb_power_enable: pmx-usb-power-enable {marvell,pins = "mpp29";marvell,function = "gpio";};pmx_led_red: pmx-led-red {marvell,pins = "mpp46";marvell,function = "gpio";};pmx_led_blue: pmx-led-blue {marvell,pins = "mpp49";marvell,function = "gpio";};pmx_sdio_cd: pmx-sdio-cd {marvell,pins = "mpp44";marvell,function = "gpio";};pmx_sdio_wp: pmx-sdio-wp {marvell,pins = "mpp47";marvell,function = "gpio";};};serial@12000 {status = "okay";};};regulators {compatible = "simple-bus";#address-cells = <1>;#size-cells = <0>;pinctrl-0 = <&pmx_usb_power_enable>;pinctrl-names = "default";usb_power: regulator@1 {compatible = "regulator-fixed";reg = <1>;regulator-name = "USB Power";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;enable-active-high;regulator-always-on;regulator-boot-on;gpio = <&gpio0 29 0>;};};-};
-&nand {
status = "okay";partition@0 {label = "u-boot";reg = <0x0000000 0x100000>;};partition@100000 {label = "uImage";reg = <0x0100000 0x400000>;};partition@500000 {label = "root";reg = <0x0500000 0x1fb00000>;};-};
-&mdio {
status = "okay";ethphy0: ethernet-phy@0 {reg = <0>;};-};
-ð0 {
status = "okay";ethernet0-port@0 {phy-handle = <ðphy0>;};-}; diff --git a/arch/arm/dts/kirkwood-sheevaplug.dts b/arch/arm/dts/kirkwood-sheevaplug.dts deleted file mode 100644 index c73cc904e5c4..000000000000 --- a/arch/arm/dts/kirkwood-sheevaplug.dts +++ /dev/null @@ -1,42 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/*
- kirkwood-sheevaplug.dts - Device tree file for Sheevaplug
- Copyright (C) 2013 Simon Baatz gmbnomis@gmail.com
- */
-/dts-v1/;
-#include "kirkwood-sheevaplug-common.dtsi"
-/ {
model = "Globalscale Technologies SheevaPlug";compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281","marvell,kirkwood";
ocp@f1000000 {mvsdio@90000 {pinctrl-0 = <&pmx_sdio>;pinctrl-names = "default";status = "okay";/* No CD or WP GPIOs */broken-cd;};};gpio-leds {compatible = "gpio-leds";pinctrl-0 = <&pmx_led_blue &pmx_led_red>;pinctrl-names = "default";health {label = "sheevaplug:blue:health";gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;default-state = "keep";};misc {label = "sheevaplug:red:misc";gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;};};-}; diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 6082bdb35b6c..1d2ba886dd1a 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -13,9 +13,6 @@ config TARGET_DS109 config TARGET_GURUPLUG bool "GuruPlug Board"
-config TARGET_SHEEVAPLUG
bool "SheevaPlug Board"config TARGET_LSXL bool "lsxl Board"
@@ -70,7 +67,6 @@ config SYS_SOC source "board/Marvell/dreamplug/Kconfig" source "board/Synology/ds109/Kconfig" source "board/Marvell/guruplug/Kconfig" -source "board/Marvell/sheevaplug/Kconfig" source "board/buffalo/lsxl/Kconfig" source "board/cloudengines/pogo_e02/Kconfig" source "board/d-link/dns325/Kconfig" diff --git a/board/Marvell/sheevaplug/Kconfig b/board/Marvell/sheevaplug/Kconfig deleted file mode 100644 index e5f928472994..000000000000 --- a/board/Marvell/sheevaplug/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_SHEEVAPLUG
-config SYS_BOARD
default "sheevaplug"-config SYS_VENDOR
default "Marvell"-config SYS_CONFIG_NAME
default "sheevaplug"-endif diff --git a/board/Marvell/sheevaplug/MAINTAINERS b/board/Marvell/sheevaplug/MAINTAINERS deleted file mode 100644 index 2b0103d07dc9..000000000000 --- a/board/Marvell/sheevaplug/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -SHEEVAPLUG BOARD -M: Prafulla Wadaskar prafulla@marvell.com -S: Maintained -F: board/Marvell/sheevaplug/ -F: include/configs/sheevaplug.h -F: configs/sheevaplug_defconfig diff --git a/board/Marvell/sheevaplug/Makefile b/board/Marvell/sheevaplug/Makefile deleted file mode 100644 index c39dd03e2d30..000000000000 --- a/board/Marvell/sheevaplug/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com
-obj-y := sheevaplug.o diff --git a/board/Marvell/sheevaplug/kwbimage.cfg b/board/Marvell/sheevaplug/kwbimage.cfg deleted file mode 100644 index f5206451da44..000000000000 --- a/board/Marvell/sheevaplug/kwbimage.cfg +++ /dev/null @@ -1,144 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer to doc/README.kwbimage for more details about how-to -# configure and create kirkwood boot images. -#
-# Boot Media configurations -BOOT_FROM nand -NAND_ECC_MODE default -NAND_PAGE_SIZE 0x0800
-# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1b1b1b9b
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000c30 # DDR Configuration register -# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01
-DATA 0xFFD01404 0x37543000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay
-DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) -# bit3-0: TRAS lsbs -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP
-DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required
-DATA 0xFFD01410 0x000000cc # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 11, Cs0size=1Gb -# bit5-4: 00, Cs1width=x8 -# bit7-6: 11, Cs1size=1Gb -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required
-DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required
-DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required
-DATA 0xFFD0141C 0x00000C52 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required
-DATA 0xFFD01420 0x00000040 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 0, DDR drive strenght normal -# bit2: 0, DDR ODT control lsd (disabled) -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, (disabled) -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required
-DATA 0xFFD01424 0x0000F17F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 0 -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required
-DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
-DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x0F, Size (i.e. 256MB)
-DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb -DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
-DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
-DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) -DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required
-DATA 0xFFD0149C 0x0000E803 # CPU ODT Control -DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write
-# End of Header extension -DATA 0x0 0x0 diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c deleted file mode 100644 index 6311ed3b2e59..000000000000 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ /dev/null @@ -1,135 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#include <common.h> -#include <init.h> -#include <miiphy.h> -#include <net.h> -#include <asm/mach-types.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> -#include <asm/arch/mpp.h> -#include "sheevaplug.h"
-DECLARE_GLOBAL_DATA_PTR;
-int board_early_init_f(void) -{
/** default gpio configuration* There are maximum 64 gpios controlled through 2 sets ofregisters
* the below configuration configures mainly initial LED status*/mvebu_config_gpio(SHEEVAPLUG_OE_VAL_LOW,SHEEVAPLUG_OE_VAL_HIGH,SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);/* Multi-Purpose Pins Functionality configuration */static const u32 kwmpp_config[] = {MPP0_NF_IO2,MPP1_NF_IO3,MPP2_NF_IO4,MPP3_NF_IO5,MPP4_NF_IO6,MPP5_NF_IO7,MPP6_SYSRST_OUTn,MPP7_GPO,MPP8_UART0_RTS,MPP9_UART0_CTS,MPP10_UART0_TXD,MPP11_UART0_RXD,MPP12_SD_CLK,MPP13_SD_CMD,MPP14_SD_D0,MPP15_SD_D1,MPP16_SD_D2,MPP17_SD_D3,MPP18_NF_IO0,MPP19_NF_IO1,MPP20_GPIO,MPP21_GPIO,MPP22_GPIO,MPP23_GPIO,MPP24_GPIO,MPP25_GPIO,MPP26_GPIO,MPP27_GPIO,MPP28_GPIO,MPP29_TSMP9,MPP30_GPIO,MPP31_GPIO,MPP32_GPIO,MPP33_GPIO,MPP34_GPIO,MPP35_GPIO,MPP36_GPIO,MPP37_GPIO,MPP38_GPIO,MPP39_GPIO,MPP40_GPIO,MPP41_GPIO,MPP42_GPIO,MPP43_GPIO,MPP44_GPIO,MPP45_GPIO,MPP46_GPIO,MPP47_GPIO,MPP48_GPIO,MPP49_GPIO,0};kirkwood_mpp_conf(kwmpp_config, NULL);return 0;-}
-int board_init(void) -{
/** arch number of board*/gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;/* adress of boot parameters */gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;return 0;-}
-#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{
u16 reg;u16 devadr;char *name = "egiga0";if (miiphy_set_current_dev(name))return;/* command to read PHY dev address */if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {printf("Err..%s could not read PHY dev address\n",__FUNCTION__);return;}/** Enable RGMII delay on Tx and Rx for CPU port* Ref: sec 4.7.2 of chip datasheet*/miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);/* reset the phy */miiphy_reset(name, devadr);printf("88E1116 Initialized on %s\n", name);-} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h deleted file mode 100644 index e026c1b53bd0..000000000000 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef __SHEEVAPLUG_H -#define __SHEEVAPLUG_H
-#define SHEEVAPLUG_OE_LOW (~(0)) -#define SHEEVAPLUG_OE_HIGH (~(0)) -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
-/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-#endif /* __SHEEVAPLUG_H */ diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig deleted file mode 100644 index 34da356b8e2a..000000000000 --- a/configs/sheevaplug_defconfig +++ /dev/null @@ -1,55 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_TARGET_SHEEVAPLUG=y -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug" -# CONFIG_SYS_MALLOC_F is not set -CONFIG_BOOTDELAY=3 -CONFIG_USE_PREBOOT=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_IDE=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:512K(uboot),512K(env),4M(kernel),-(rootfs)" -CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y -CONFIG_OF_CONTROL=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_NETCONSOLE=y -CONFIG_DM=y -CONFIG_MVSATA_IDE=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_DM_RTC=y -CONFIG_RTC_MV=y -CONFIG_SYS_NS16550=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_LZMA=y -CONFIG_BZIP2=y diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h deleted file mode 100644 index e1f8fb8ac84b..000000000000 --- a/include/configs/sheevaplug.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- (C) Copyright 2009-2014
- Gerald Kerma dreagle@doukki.net
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef _CONFIG_SHEEVAPLUG_H -#define _CONFIG_SHEEVAPLUG_H
-/*
- High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
-#include "mv-plug-common.h"
-/*
- Environment variables configurations
- */
-/*
- max 4k env size is enough, but in case of nand
- it has to be rounded to sector size
- */
-/*
- Environment is right behind U-Boot in flash. Make sure U-Boot
- doesn't grow into the environment area.
- */
-#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET
-/*
- Default environment variables
- */
-#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \"bootm 0x6400000;"-#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \"x_bootcmd_usb=usb start\0" \"x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"-/*
- Ethernet Driver configuration
- */
-#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */
-/*
- SDIO/MMC Card Configuration
- */
-#ifdef CONFIG_CMD_MMC -#define CONFIG_MVEBU_MMC -#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE -#endif /* CONFIG_CMD_MMC */
-/*
- SATA driver configuration
- */
-#ifdef CONFIG_IDE -#define __io -#define CONFIG_IDE_PREINIT -#define CONFIG_MVSATA_IDE_USE_PORT0 -#define CONFIG_MVSATA_IDE_USE_PORT1 -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET -#endif /* CONFIG_IDE */
-#endif /* _CONFIG_SHEEVAPLUG_H */
2.17.1