
1 Nov
2011
1 Nov
'11
9:38 p.m.
Hi Simon,
On 02/11/11 04:22, Simon Glass wrote:
- /* Need to reset PHY -> 500ms reset */
- erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
AT91_RSTC_MR_URSTEN, &rstc->mr);
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
You don't actually need to reset the PHY for 500ms, only 100us, so the AT91_RSTC_MR_ERSTL(13) can be replaced with AT91_RSTC_MR_ERSTL(0), which give you the minimum delay (62ms I think).
Regards, Andre
--
Bluewater Systems - An Aiotec Company
Andre Renaud
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