30 Jul
2019
30 Jul
'19
1:34 a.m.
On Mon, Jul 29, 2019 at 2:02 PM Anatolij Gustschin agust@denx.de wrote:
On 88E6071 chip the port status register bit field offsets for duplex and link bits differ. Extend the driver to use 88E6071 specific offset values. The width of bit fields for speed status differ, too. Adapt for proper port speed detection on 88E6071.
Signed-off-by: Anatolij Gustschin agust@denx.de Reviewed-by: Chris Packham judge.packham@gmail.com Tested-by: Chris Packham judge.packham@gmail.com
Acked-by: Joe Hershberger joe.hershberger@ni.com