Hi Sjoerd,
On 24 March 2015 at 01:46, Sjoerd Simons sjoerd.simons@collabora.co.uk wrote:
Hey Simon,
On Mon, 2015-03-23 at 15:04 -0600, Simon Glass wrote:
Hi Sjoerd,
On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.simons@collabora.co.uk wrote:
The peach boards have their SDRAM start address at 0x20000000 instead of 0x40000000 which seems common for all other exynos5 based boards. This means the layout set in exynos5-common.h causes the kernel be loaded more then 128MB (at 0x42000000) away from memory start which breaks booting kernels with CONFIG_AUTO_ZRELADDR
Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses the same offsets from start of memory as the common exynos5 settings.
This fixes booting via bootz and PXE
<snip>
It would be great if we could have this in the device tree.
I haven't merged this patch yet, but it goes some of the way:
I think it would be awesome to have this via device tree as well as that would be another step closer to allowing one u-boot binary for a group of boards. However, that's clearly much more work. So for the short term (and ideally the coming release) i'd quite prefer this minimal change to go in to unbreak bootz and PXE on these boards.
OK.
Reviewed-by: Simon Glass sjg@chromium.org
Who is going to apply this?
Regards, Simon