
11 Jul
2019
11 Jul
'19
6:21 a.m.
On Tue, Jul 9, 2019 at 5:34 PM Andes uboot@andestech.com wrote:
From: Rick Chen rick@andestech.com
When L2 node exists inside cpus node, uclass_get_device can not parse L2 node successfully. So move it outside from cpus node.
Also add tag-ram-ctl and data-ram-ctl attributes for v5l2 cache controller driver. This can adjust timing by requirement from dtb to improve performance.
Signed-off-by: Rick Chen rick@andestech.com Cc: Greentime Hu greentime@andestech.com Cc: KC Lin kclin@andestech.com
arch/riscv/dts/ae350_32.dts | 17 +++++++++++------ arch/riscv/dts/ae350_64.dts | 17 +++++++++++------ 2 files changed, 22 insertions(+), 12 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com