
14 Apr
2017
14 Apr
'17
12:25 p.m.
On 04/13/2017 07:41 PM, Ley Foon Tan wrote:
Add config and defconfig for the Arria10 and update socfpga_common.h.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
[...]
@@ -298,7 +306,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR -#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SPL_BOARD_INIT
This should be in Kconfig and selected by arch/arm/mach-socfpga/Kconfig entry for A10
+#endif
/* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT
--
Best regards,
Marek Vasut