From: Icenowy Zheng icenowy@aosc.xyz
Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM chips.
Add support for LPDDR3 DRAM in the DesignWare-like DRAM controller code.
Real LPDDR3 chips' support is not added yet in this commit.
Signed-off-by: Icenowy Zheng icenowy@aosc.xyz --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 2 ++ board/sunxi/Kconfig | 3 +++ 2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 20c3055b7a..78b4ffb9c3 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -342,6 +342,8 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para) MCTL_CR_DDR3 | MCTL_CR_2T | #elif defined CONFIG_SUNXI_DRAM_DDR2 MCTL_CR_DDR2 | MCTL_CR_2T | +#elif defined CONFIG_SUNXI_DRAM_LPDDR3 + MCTL_CR_LPDDR3 | MCTL_CR_1T | #else #error Unsupported DRAM type! #endif diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 08df738f94..8be75048d1 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -246,6 +246,9 @@ config SUNXI_DRAM_DDR3 config SUNXI_DRAM_DDR2 bool
+config SUNXI_DRAM_LPDDR3 + bool + choice prompt "DRAM Type and Timing" default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S