The TI816x has 2 GPIO banks. For bank 0 we had been clearing the enable bit when setting BIT(8). Correct this by setting it to BIT(1) | BIT(8) after we set and wait for BIT(1) (aka PRCM_MOD_EN). Enable GPIO1 as well so that when CMD_GPIO is enabled it won't crash probing the second bank. Enable CMD_GPIO on ti816x_evm.
Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/mach-omap2/am33xx/clock_ti816x.c | 8 +++++++- configs/ti816x_evm_defconfig | 1 + 2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/am33xx/clock_ti816x.c b/arch/arm/mach-omap2/am33xx/clock_ti816x.c index 967623d467b0..e9c7b2d99690 100644 --- a/arch/arm/mach-omap2/am33xx/clock_ti816x.c +++ b/arch/arm/mach-omap2/am33xx/clock_ti816x.c @@ -335,7 +335,13 @@ static void peripheral_enable(void) writel(PRCM_MOD_EN, &cmalwon->gpio0clkctrl); while (readl(&cmalwon->gpio0clkctrl) != PRCM_MOD_EN) ; - writel((BIT(8)), &cmalwon->gpio0clkctrl); + writel((BIT(1) | BIT(8)), &cmalwon->gpio0clkctrl); + + /* Enable gpio1 */ + writel(PRCM_MOD_EN, &cmalwon->gpio1clkctrl); + while (readl(&cmalwon->gpio1clkctrl) != PRCM_MOD_EN) + ; + writel((BIT(1) | BIT(8)), &cmalwon->gpio1clkctrl);
/* Enable spi */ writel(PRCM_MOD_EN, &cmalwon->spiclkctrl); diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 7f43ecb7ebc2..2ae72b2f77d4 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y # CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set