Commit a058052c changed the generic phy_reset() to clear all bits in BMCR. This inevitably clears the ANEG bit. m88e1145 requires any change to ANEG bit to be followed by a software reset. This seems to be different from other PHYs. Implemente read-modify-write prodecure for this PHY init.
Signed-off-by: York Sun york.sun@nxp.com --- This issue was observed on MPC8548CDS. The fix has been verified on the same board.
drivers/net/phy/marvell.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index ab0c443..4722fd3 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -439,7 +439,10 @@ static int m88e1145_config(struct phy_device *phydev)
genphy_config_aneg(phydev);
- phy_reset(phydev); + /* soft reset */ + reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); + reg |= BMCR_RESET; + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, reg);
return 0; }