On Fri, Dec 17, 2021 at 10:35 AM Angus Ainslie angus@akkea.ca wrote:
Hi Fabio,
On 2021-12-17 08:28, Fabio Estevam wrote:
Hi Angus,
On Fri, Dec 17, 2021 at 12:21 PM Angus Ainslie angus@akkea.ca wrote:
Add the USB regs for SDP mode
Signed-off-by: Angus Ainslie angus@akkea.ca
arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 8cb499d3a3..bd474f88a6 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -103,6 +103,11 @@ IMX_CSPI2_BASE, \ IMX_CSPI3_BASE
+#define USB1_BASE_ADDR 0x38100000 +#define USB2_BASE_ADDR 0x38200000 +#define USB1_PHY_BASE_ADDR 0x381F0000 +#define USB2_PHY_BASE_ADDR 0x382F0000
Some time ago I sent a similar patch and the feedback from Marek was that these base addresses should be retrieved from the devicetree instead.
I didn't think Driver model was a requirement for SPL.
I had problems getting the dwc3 to initialize properly when using the device model in the SPL. I'm currently just using this in the SPL and the device model in u-boot.
I'll take another shot at initializing the dwc3 in the SPL with the DM.
Could we compromise by putting the #define statements in an ifdef to only enable them when SPL is being built?
Thanks Angus